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cc26x0: add AON_RTC definitions

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Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
This commit is contained in:
Jean Pierre Dudey 2020-03-16 18:14:32 -05:00
parent 1bb689ff45
commit f1af3ae043
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1 changed files with 34 additions and 0 deletions
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34
cpu/cc26x0/include/cc26x0_prcm.h
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@ -202,6 +202,40 @@ typedef struct {
#define AON_WUC ((aon_wuc_regs_t *) (AON_WUC_BASE)) /**< AON_WUC register bank */ #define AON_WUC ((aon_wuc_regs_t *) (AON_WUC_BASE)) /**< AON_WUC register bank */
/**
* AON_RTC registers
*/
typedef struct {
reg32_t CTL; /**< Control */
reg32_t EVFLAGS; /**< Event Flags, RTC Status */
reg32_t SEC; /**< Second Counter Value, Integer Part */
reg32_t SUBSEC; /**< Second Counter Value, Fractional Part */
reg32_t SUBSECINC; /**< Subseconds Increment */
reg32_t CHCTL; /**< Channel Configuration */
reg32_t CH0CMP; /**< Channel 0 Compare Value */
reg32_t CH1CMP; /**< Channel 1 Compare Value */
reg32_t CH2CMP; /**< Channel 2 Compare Value */
reg32_t CH2CMPINC; /**< Channel 2 Compare Value Auto-increment */
reg32_t CH1CAPT; /**< Channel 1 Capture Value */
reg32_t SYNC; /**< AON Synchronization */
} aon_rtc_regs_t;
/**
* @brief RTC_UPD is a 16 KHz signal used to sync up the radio timer. The
* 16 Khz is SCLK_LF divided by 2
* @details 0h = RTC_UPD signal is forced to 0
* 1h = RTC_UPD signal is toggling @16 kHz
*/
#define AON_RTC_CTL_RTC_UPD_EN 0x00000002
/** @ingroup cpu_specific_peripheral_memory_map
* @{
*/
#define AON_RTC_BASE (PERIPH_BASE + 0x92000) /**< AON_RTC base address */
/** @} */
#define AON_RTC ((aon_rtc_regs_t *) (AON_RTC_BASE)) /**< AON_RTC register bank */
/** /**
* PRCM registers * PRCM registers