cpu/stm32f0: optimization of startup code
- make use of common startup code - make use of common exception handlers - renamed startup.c to vectors.c
This commit is contained in:
Hauke Petersen
parent
aa583f254d
commit
f30b7bf13d
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_stm32f0
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* @{
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*
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* @file
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* @brief Startup code and interrupt vector definition
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*
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* @}
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*/
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#include <stdint.h>
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#include "panic.h"
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/**
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* memory markers as defined in the linker script
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*/
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extern uint32_t _sfixed;
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extern uint32_t _efixed;
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extern uint32_t _etext;
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extern uint32_t _srelocate;
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extern uint32_t _erelocate;
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extern uint32_t _szero;
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extern uint32_t _ezero;
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extern uint32_t _sstack;
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extern uint32_t _estack;
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/**
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* @brief functions for initializing the board, std-lib and kernel
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*/
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extern void board_init(void);
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extern void kernel_init(void);
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extern void __libc_init_array(void);
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/**
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* @brief This function is the entry point after a system reset
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*
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* After a system reset, the following steps are necessary and carried out:
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* 1. load data section from flash to ram
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* 2. overwrite uninitialized data section (BSS) with zeros
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* 3. initialize the newlib
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* 4. initialize the board (sync clock, setup std-IO)
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* 5. initialize and start RIOTs kernel
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*/
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void reset_handler(void)
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{
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uint32_t *dst;
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uint32_t *src = &_etext;
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/* load data section from flash to ram */
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for (dst = &_srelocate; dst < &_erelocate; ) {
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*(dst++) = *(src++);
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}
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/* default bss section to zero */
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for (dst = &_szero; dst < &_ezero; ) {
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*(dst++) = 0;
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}
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/* initialize the board and startup the kernel */
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board_init();
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/* initialize std-c library (this should be done after board_init) */
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__libc_init_array();
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/* startup the kernel */
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kernel_init();
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}
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/**
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* @brief Default handler is called in case no interrupt handler was defined
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*/
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void dummy_handler(void)
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{
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core_panic(PANIC_DUMMY_HANDLER, "DUMMY HANDLER");
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}
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void isr_nmi(void)
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{
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core_panic(PANIC_NMI_HANDLER, "NMI HANDLER");
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}
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void isr_hard_fault(void)
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{
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core_panic(PANIC_HARD_FAULT, "HARD FAULT");
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}
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/* Cortex-M specific interrupt vectors */
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void isr_svc(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_pendsv(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_systick(void) __attribute__ ((weak, alias("dummy_handler")));
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/* STM32F051R8 specific interrupt vector */
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void isr_wwdg(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_pvd(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_rtc(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_flash(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_rcc(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_exti0_1(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_exti2_3(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_exti4_15(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_ts(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_dma1_ch1(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_dma1_ch2_3(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_dma1_ch4_5(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_adc1_comp(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_tim1_brk_up_trg_com(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_tim1_cc(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_tim2(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_tim3(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_tim6_dac(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_tim7(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_tim14(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_tim15(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_tim16(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_tim17(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_i2c1(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_i2c2(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_spi1(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_spi2(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_usart1(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_usart2(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_usart3_8(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_cec(void) __attribute__ ((weak, alias("dummy_handler")));
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/* interrupt vector table */
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__attribute__ ((section(".vectors")))
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const void *interrupt_vector[] = {
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/* Stack pointer */
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(void*) (&_estack), /* pointer to the top of the empty stack */
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/* Cortex-M handlers */
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(void*) reset_handler, /* entry point of the program */
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(void*) isr_nmi, /* non maskable interrupt handler */
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(void*) isr_hard_fault, /* if you end up here its not good */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) isr_svc, /* system call interrupt */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) isr_pendsv, /* pendSV interrupt, used for task switching in RIOT */
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(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
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/* STM specific peripheral handlers */
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(void*) isr_wwdg, /* windowed watchdog */
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(void*) isr_pvd, /* power control */
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(void*) isr_rtc, /* real time clock */
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(void*) isr_flash, /* flash memory controller */
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(void*) isr_rcc, /* reset and clock control */
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(void*) isr_exti0_1, /* external interrupt lines 0 and 1 */
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(void*) isr_exti2_3, /* external interrupt lines 2 and 3 */
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(void*) isr_exti4_15, /* external interrupt lines 4 to 15 */
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(void*) isr_ts, /* touch sensing input*/
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(void*) isr_dma1_ch1, /* direct memory access controller 1, channel 1*/
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(void*) isr_dma1_ch2_3, /* direct memory access controller 1, channel 2 and 3*/
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(void*) isr_dma1_ch4_5, /* direct memory access controller 1, channel 4 and 5*/
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(void*) isr_adc1_comp, /* analog digital converter */
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(void*) isr_tim1_brk_up_trg_com, /* timer 1 break, update, trigger and communication */
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(void*) isr_tim1_cc, /* timer 1 capture compare */
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(void*) isr_tim2, /* timer 2 */
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(void*) isr_tim3, /* timer 3 */
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(void*) isr_tim6_dac, /* timer 6 and digital to analog converter */
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(void*) isr_tim7, /* timer 7 */
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(void*) isr_tim14, /* timer 14 */
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(void*) isr_tim15, /* timer 15 */
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(void*) isr_tim16, /* timer 16 */
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(void*) isr_tim17, /* timer 17 */
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(void*) isr_i2c1, /* I2C 1 */
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(void*) isr_i2c2, /* I2C 2 */
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(void*) isr_spi1, /* SPI 1 */
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(void*) isr_spi2, /* SPI 2 */
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(void*) isr_usart1, /* USART 1 */
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(void*) isr_usart2, /* USART 2 */
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(void*) isr_usart3_8, /* USART 3 to 8 */
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(void*) isr_cec, /* consumer electronics control */
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(void*) (0UL) /* reserved */
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};
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125
cpu/stm32f0/vectors.c
Normal file
125
cpu/stm32f0/vectors.c
Normal file
@ -0,0 +1,125 @@
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/*
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* Copyright (C) 2014-2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_stm32f0
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* @{
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*
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* @file
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* @brief Interrupt vector definitions
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*
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* @}
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*/
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#include <stdint.h>
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#include "vectors_cortexm.h"
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/* get the start of the ISR stack as defined in the linkerscript */
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extern uint32_t _estack;
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/* define a local dummy handler as it needs to be in the same compilation unit
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* as the alias definition */
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void dummy_handler(void) {
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dummy_handler_default();
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}
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/* Cortex-M common interrupt vectors */
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WEAK_DEFAULT void isr_svc(void);
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WEAK_DEFAULT void isr_pendsv(void);
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WEAK_DEFAULT void isr_systick(void);
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/* STM32F0 specific interrupt vectors */
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WEAK_DEFAULT void isr_wwdg(void);
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WEAK_DEFAULT void isr_pvd(void);
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WEAK_DEFAULT void isr_rtc(void);
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WEAK_DEFAULT void isr_flash(void);
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WEAK_DEFAULT void isr_rcc(void);
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WEAK_DEFAULT void isr_exti0_1(void);
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WEAK_DEFAULT void isr_exti2_3(void);
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WEAK_DEFAULT void isr_exti4_15(void);
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WEAK_DEFAULT void isr_ts(void);
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WEAK_DEFAULT void isr_dma1_ch1(void);
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WEAK_DEFAULT void isr_dma1_ch2_3(void);
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WEAK_DEFAULT void isr_dma1_ch4_5(void);
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WEAK_DEFAULT void isr_adc1_comp(void);
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WEAK_DEFAULT void isr_tim1_brk_up_trg_com(void);
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WEAK_DEFAULT void isr_tim1_cc(void);
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WEAK_DEFAULT void isr_tim2(void);
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WEAK_DEFAULT void isr_tim3(void);
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WEAK_DEFAULT void isr_tim6_dac(void);
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WEAK_DEFAULT void isr_tim7(void);
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WEAK_DEFAULT void isr_tim14(void);
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WEAK_DEFAULT void isr_tim15(void);
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WEAK_DEFAULT void isr_tim16(void);
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WEAK_DEFAULT void isr_tim17(void);
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WEAK_DEFAULT void isr_i2c1(void);
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WEAK_DEFAULT void isr_i2c2(void);
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WEAK_DEFAULT void isr_spi1(void);
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WEAK_DEFAULT void isr_spi2(void);
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WEAK_DEFAULT void isr_usart1(void);
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WEAK_DEFAULT void isr_usart2(void);
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WEAK_DEFAULT void isr_usart3_8(void);
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WEAK_DEFAULT void isr_cec(void);
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/* interrupt vector table */
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ISR_VECTORS const void *interrupt_vector[] = {
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/* Exception stack pointer */
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(void*) (&_estack), /* pointer to the top of the stack */
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/* Cortex-M0 handlers */
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(void*) reset_handler_default, /* entry point of the program */
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(void*) nmi_default, /* non maskable interrupt handler */
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(void*) hard_fault_default, /* hard fault exception */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) isr_svc, /* system call interrupt, in RIOT used for
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* switching into thread context on boot */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
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* context switching is happening here */
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(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
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/* STM specific peripheral handlers */
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(void*) isr_wwdg, /* windowed watchdog */
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(void*) isr_pvd, /* power control */
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(void*) isr_rtc, /* real time clock */
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(void*) isr_flash, /* flash memory controller */
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(void*) isr_rcc, /* reset and clock control */
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(void*) isr_exti0_1, /* external interrupt lines 0 and 1 */
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(void*) isr_exti2_3, /* external interrupt lines 2 and 3 */
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(void*) isr_exti4_15, /* external interrupt lines 4 to 15 */
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(void*) isr_ts, /* touch sensing input*/
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(void*) isr_dma1_ch1, /* direct memory access controller 1, channel 1*/
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(void*) isr_dma1_ch2_3, /* direct memory access controller 1, channel 2 and 3*/
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(void*) isr_dma1_ch4_5, /* direct memory access controller 1, channel 4 and 5*/
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(void*) isr_adc1_comp, /* analog digital converter */
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(void*) isr_tim1_brk_up_trg_com, /* timer 1 break, update, trigger and communication */
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(void*) isr_tim1_cc, /* timer 1 capture compare */
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(void*) isr_tim2, /* timer 2 */
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(void*) isr_tim3, /* timer 3 */
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(void*) isr_tim6_dac, /* timer 6 and digital to analog converter */
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(void*) isr_tim7, /* timer 7 */
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(void*) isr_tim14, /* timer 14 */
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(void*) isr_tim15, /* timer 15 */
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(void*) isr_tim16, /* timer 16 */
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(void*) isr_tim17, /* timer 17 */
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(void*) isr_i2c1, /* I2C 1 */
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(void*) isr_i2c2, /* I2C 2 */
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(void*) isr_spi1, /* SPI 1 */
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(void*) isr_spi2, /* SPI 2 */
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(void*) isr_usart1, /* USART 1 */
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(void*) isr_usart2, /* USART 2 */
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(void*) isr_usart3_8, /* USART 3 to 8 */
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(void*) isr_cec, /* consumer electronics control */
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(void*) (0UL) /* reserved */
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};
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