cpu/esp32: add RTT counter implementation
fixup! cpu/esp32: add RTT counter implementation
This commit is contained in:
Gunar Schorcht
parent
6cd9896ac0
commit
f67cb48f6d
@ -95,6 +95,11 @@ ifneq (,$(filter pm_layered,$(USEMODULE)))
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USEMODULE += periph_rtc
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endif
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ifneq (,$(filter periph_rtt,$(USEMODULE)))
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USEMODULE += periph_rtt_hw_sys
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USEMODULE += periph_rtt_hw_rtc
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endif
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ifneq (,$(filter shell,$(USEMODULE)))
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USEMODULE += ps
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endif
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@ -6,3 +6,4 @@ FEATURES_PROVIDED += arch_esp32
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FEATURES_PROVIDED += esp_wifi_enterprise
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FEATURES_PROVIDED += periph_adc_ctrl
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FEATURES_PROVIDED += periph_rtc
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FEATURES_PROVIDED += periph_rtt
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@ -38,7 +38,7 @@
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5. [PWM Channels](#esp32_pwm_channels)
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6. [SPI Interfaces](#esp32_spi_interfaces)
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7. [Timers](#esp32_timers)
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8. [RTC Timer](#esp32_rtc_timer)
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8. [RTT Implementation](#esp32_rtt_counter)
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9. [UART Interfaces](#esp32_uart_interfaces)
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10. [CAN Interfaces](#esp32_can_interfaces)
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11. [Power Management](#esp32_power_management)
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@ -120,8 +120,7 @@ Module | Default | Short description
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[esp_log_startup](#esp32_esp_log_module) | not used | enable additional startup information
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[esp_log_tagged](#esp32_esp_log_module) | not used | add additional information to the log output
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[esp_now](#esp32_esp_now_network_interface) | not used | enable the ESP-NOW network device
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[esp_rtc_timer](#esp32_rtc_timer) | not used | enable RTC hardware timer with internal 150 kHz RC oscillator
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[esp_rtc_timer_32k](#esp32_rtc_timer) | not used | enable RTC hardware timer with external 32.768 kHz crystal.
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[esp_rtc_timer_32k](#esp32_rtt_counter) | not used | use RTC timer with external 32.768 kHz crystal as RTT
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[esp_spi_ram](#esp32_spi_ram) | not used | enable SPI RAM
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[esp_spiffs](#esp32_spiffs_device) | not used | enable SPIFFS for on-board flash memory
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[esp_wifi](#esp32_wifi_network_interface) | not used | enable the Wifi network device in WPA2 personal mode
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@ -422,7 +421,6 @@ esp_log_colored | Enable colored log output, see section [Log output](#esp32_esp
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esp_log_startup | Enable additional startup information, see section [Log output](#esp32_esp_log_module).
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esp_log_tagged | Add additional information to the log output, see section [Log output](#esp32_esp_log_module).
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esp_now | Enable the built-in WiFi module with the ESP-NOW protocol as `netdev` network device, see section [ESP-NOW Network Interface](#esp32_esp_now_network_interface).
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esp_rtc_timer | Enable RTC hardware timer with internal 150 kHz RC oscillator.
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esp_rtc_timer_32k | Enable RTC hardware timer with external 32.768 kHz crystal.
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esp_spiffs | Enable the optional SPIFFS drive in on-board flash memory, see section [SPIFFS Device](#esp32_spiffs_device).
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esp_spi_ram | Enable the optional SPI RAM, see section [SPI RAM Modules](#esp32_spi_ram).
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@ -839,37 +837,31 @@ to application's makefile.
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Timers are MCU built-in features and not board-specific. There is nothing to be configured.
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\anchor esp32_rtc_timer
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## <a name="esp32_rtc_timer"> RTC Timer </a> [[TOC](#esp32_toc)]
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\anchor esp32_rtt_counter
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## <a name="esp32_rtt_counter"> RTT implementation </a> [[TOC](#esp32_toc)]
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The RTC hardware timer of the ESP32 can be clocked with either an external
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32.768 kHz crystal or the internal adjustable 150 kHz RC oscillator. If the
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the external 32.768 kHz crystal is not available, the internal 150 kHz RC
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oscillator is used automatically. However, since this internal 150 kHz RC
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oscillator is not very accurate, the RTC low-level driver uses by default
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the PLL-controlled 64-bit microsecond system timer to emulate the RTC timer.
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The RTT peripheral low-level driver provides a RTT (Real Time Timer) with
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a frequency of 32.768 kHz. It either uses the RTC hardware timer if an
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external 32.768 kHz crystal is connected to the ESP32 or the PLL-controlled
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64-bit microsecond system timer to emulate the RTC timer.
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To allow the use of the RTC hardware timer for boards with an external
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32 kHz crystal, the pseudomodules `esp_rtc_timer` and `esp_rtc_timer_32k`
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can be used to control which timer is used by the RTC low-level driver
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as following:
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Whether an external 32.768 kHz crystal is connected to the ESP32 is
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specified as a feature by the board definition using the pseudomodule
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`esp_rtc_timer_32k`. If the feature `esp_rtc_timer_32k` is defined but the
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external 32.768 kHz crystal is not recognized during startup, the
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PLL controlled 64 bit microsecond system timer is used to emulate the
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RTC timer.
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- **esp_rtc_timer**:
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Use always the RTC hardware timer with the **internal 150 kHz RC** oscillator.
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The RTT is retained during light and deep sleep as well as during a restart.
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The RTC hardware timer is used for this purpose, regardless of whether an
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external 32.768 kHz crystal is connected to the ESP32 or the internal 150 kHz
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RC oscillator is used. All current timer values are saved in the RTC memory
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before entering a sleep mode or restart and are restored after when waking up
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or restarting.
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- **esp_rtc_timer_32k**:
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Use the RTC hardware timer with the **external 32.768 kHz crystal**. If the
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external 32.768 kHz crystal is not available, the RTC hardware timer
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is used with the internal 150 kHz RC oscillator.
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If none of the modules above is enabled, the PLL-driven **emulated RTC timer**
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is used. In this case, the RTC hardware timer with the internal RC 150 kHz
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oscillator is only used in deep sleep mode and during a reset.
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@note The accuracy of the emulated RTC timer is better than the accuracy of the
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RTC hardware timer with the internal 150 kHz RC oscillator. If you have not
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connected an external 32.768 kHz crystal, you should use the default
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configuration.
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@note The RTT implementation is also used to implement a RTC (Real Time Clock)
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peripheral. For this purpose the module `rt_rtc` is automatically enabled
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when the feature `periph_rtc` is used.
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\anchor esp32_uart_interfaces
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## <a name="esp32_uart_interfaces"> UART Interfaces </a> [[TOC](#esp32_toc)]
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@ -409,6 +409,27 @@ typedef struct {
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#define RNG_DATA_REG_ADDR (0x3ff75144)
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/** @} */
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/**
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* @name RTT and RTC configuration
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* @{
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*/
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/**
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* @brief RTT frequency definition
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*
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* The RTT frequency is always 32.768 kHz even if no external crystal is
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* connected. In this case the RTT value counted with the internal 150 kHz
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* RC oscillator is converted to a value for an RTT with 32.768 kHz.
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*/
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#define RTT_FREQUENCY (32768UL)
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/**
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* @brief RTT is a 32-bit counter
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*/
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#define RTT_MAX_VALUE (0xFFFFFFFFUL)
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/** @} */
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/**
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* @name SPI configuration
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*
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124
cpu/esp32/include/rtt_arch.h
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124
cpu/esp32/include/rtt_arch.h
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@ -0,0 +1,124 @@
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/*
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* Copyright (C) 2020 Gunar Schorcht
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_esp32
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* @{
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*
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* @file
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* @brief Architecture specific RTT functions for ESP32
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*
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* The RTT peripheral driver implements a 32-bit RTT counter with a frequency
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* of 32.768 kHz. It uses either
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*
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* - the 48-bit RTC counter if an external 32.678 kHz crystal is connected or
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* - the 64-bit microsecond system timer.
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*
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* For this purpose, a hardware abstraction layer is defined by a driver
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* interface of the type rtt_hw_driver_t, which generally provides a
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* 48-bit RTC counter with a frequency of 32.678 kHz. This way the RTT
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* implementation always sees a 48-bit counter with a frequency of 32.768 kHz
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* regardless of which hardware implementation is actually used.
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*
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* If pseudomodule `esp_rtc_timer_32` is enabled by the board definition and
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* the 32.768 kHz crystal is actually connected, the 48-bit RTC counter
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* is used. Otherwise, the 64 bit microsecond system timer is used.
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*
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* Since the 64-bit microsecond system timer does not work during light/deep
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* or during a reboot, the status of the 64-bit microsecond system timer is
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* saved in RTC memory before entering a sleep mode or reboot. When leaving
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* the sleep mode or after a reboot, it will be updated from the RTC counter.
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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*/
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#ifndef RTT_ARCH_H
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#define RTT_ARCH_H
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#include "periph/rtt.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Maximum value of the 48-bit RTT hardware counter
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*/
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#define RTT_HW_COUNTER_MAX ((1ULL << 48) - 1)
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/**
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* @brief RTT hardware abstraction layer driver
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*/
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typedef struct {
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/**
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* @brief Init the current hardware counter
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*/
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void (*init)(void);
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/**
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* @brief Get the current hardware counter value
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* @return 48-bit counter value with a frequency of 32.768 kHz
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*/
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uint64_t (*get_counter)(void);
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/**
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* @brief Set the hardware alarm
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* @param[in] alarm alarm time as 32.768 kHz ticks
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* @param[in] cb function called on alarm interrupt
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* @param[in] arg argument used as parameter for the @p cb function
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*/
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void (*set_alarm)(uint32_t alarm, rtt_cb_t cb, void *arg);
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/**
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* @brief Clear the hardware alarm
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*/
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void (*clear_alarm)(void);
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/**
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* @brief Save the counter value before sleep or reboot if necessary
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*/
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void (*save_counter)(void);
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/**
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* @brief Restore the counter value before sleep or reboot
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* @param[in] in_init true if function is called after deep sleep or
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* reboot, false otherwise
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*/
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void (*restore_counter)(bool in_init);
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/**
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* @brief Enable the RTT hardware counter
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*/
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void (*poweron)(void);
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/**
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* @brief Disable the RTT hardware counter
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*/
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void (*poweroff)(void);
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} rtt_hw_driver_t;
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/**
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* @brief Called before the power management enters a light or deep sleep mode
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* @param mode sleep mode that is entered
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* @return time to sleep in us
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*/
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uint64_t rtt_pm_sleep_enter(unsigned mode);
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/**
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* @brief Called after the power management left light sleep mode
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* @param cause wake-up cause
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*/
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void rtt_pm_sleep_exit(uint32_t cause);
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#ifdef __cplusplus
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}
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#endif
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#endif /* RTT_ARCH_H */
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/** @} */
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282
cpu/esp32/periph/rtt.c
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282
cpu/esp32/periph/rtt.c
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@ -0,0 +1,282 @@
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/*
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* Copyright (C) 2020 Gunar Schorcht
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_esp32
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* @ingroup drivers_periph_rtt
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* @{
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*
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* @file
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* @brief Low-level RTT driver implementation for ESP32
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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*
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* @}
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*/
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#include "cpu.h"
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#include "esp_attr.h"
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#include "esp_sleep.h"
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#include "irq_arch.h"
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#include "log.h"
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#include "periph/rtt.h"
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#include "rtt_arch.h"
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#include "syscalls.h"
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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#define RTC_CLK_CAL_FRACT 19 /* fractional bits of calibration value */
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/* contains the values as given at the interface */
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typedef struct {
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uint32_t alarm; /**< alarm value as set at the interface */
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rtt_cb_t alarm_cb; /**< alarm callback */
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rtt_cb_t overflow_cb; /**< overflow callback */
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void *alarm_arg; /**< argument for alarm callback */
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void *overflow_arg; /**< argument for overflow callback */
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uint32_t alarm_active; /**< alarm that is currently active */
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bool alarm_set; /**< indicates whether an alarm is active */
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bool wakeup; /**< indicates whether next alarm is a wake-up */
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} rtt_counter_t;
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static rtt_counter_t rtt_counter;
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static uint32_t RTC_BSS_ATTR _rtt_offset;
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/* we can't include soc/rtc.h because of rtc_init declaration conflicts */
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extern uint32_t rtc_clk_slow_freq_get_hz(void);
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/* forward declaration of functions */
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void rtt_restore_counter(bool sys_time);
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static void _rtt_update_hw_alarm(void);
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static void IRAM_ATTR _rtt_isr(void *arg);
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/* forward declarations of driver functions */
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uint64_t _rtc_get_counter(void);
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/* declaration of hardware counters */
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extern const rtt_hw_driver_t _rtt_hw_sys_driver;
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extern const rtt_hw_driver_t _rtt_hw_rtc_driver;
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/* used hardware driver (default _rtt_hw_sys_driver) */
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static const rtt_hw_driver_t *_rtt_hw = &_rtt_hw_sys_driver;
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void rtt_init(void)
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{
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if (IS_USED(MODULE_ESP_RTC_TIMER_32K)) {
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/* check whether the 32.678 kHz crystal is working */
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if (rtc_clk_slow_freq_get_hz() == 32768) {
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_rtt_hw = &_rtt_hw_rtc_driver;
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}
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else {
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LOG_ERROR("[rtt] 32.768 kHz crystal not used!\n");
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}
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}
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DEBUG("%s rtt_offset=%u @rtc=%llu rtc_active=%d @sys_time=%llu\n", __func__,
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_rtt_offset, _rtc_get_counter(),
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(_rtt_hw == &_rtt_hw_sys_driver) ? 1 : 0, system_get_time_64());
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/* init the hardware counter if necessary */
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_rtt_hw->init();
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/* restore counter from RTC after deep sleep or reboot */
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rtt_restore_counter(true);
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/* clear alarm settings */
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rtt_clear_alarm();
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rtt_clear_overflow_cb();
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/* power on the module and enable interrupts */
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rtt_poweron();
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}
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void rtt_poweron(void)
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{
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_rtt_hw->poweron();
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}
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void rtt_poweroff(void)
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{
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_rtt_hw->poweroff();
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}
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void rtt_set_overflow_cb(rtt_cb_t cb, void *arg)
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{
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/* there is no overflow interrupt, we emulate */
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rtt_counter.overflow_cb = cb;
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rtt_counter.overflow_arg = arg;
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_rtt_update_hw_alarm();
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}
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void rtt_clear_overflow_cb(void)
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{
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/* there is no overflow interrupt, we emulate */
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rtt_counter.overflow_cb = NULL;
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rtt_counter.overflow_arg = NULL;
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_rtt_update_hw_alarm();
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}
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uint32_t rtt_get_counter(void)
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{
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/* we use only the lower 32 bit of the 48-bit RTC counter */
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uint32_t counter = _rtt_hw->get_counter() + _rtt_offset;
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DEBUG("%s counter=%u @sys_time=%u\n", __func__, counter, system_get_time());
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return counter;
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}
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void rtt_set_counter(uint32_t counter)
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{
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uint32_t _rtt_current = _rtt_hw->get_counter();
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_rtt_offset = counter - _rtt_current;
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DEBUG("%s set=%u rtt_offset=%u @rtt=%u\n",
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__func__, counter, _rtt_offset, _rtt_current);
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_rtt_update_hw_alarm();
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}
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void rtt_set_alarm(uint32_t alarm, rtt_cb_t cb, void *arg)
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{
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uint32_t counter = rtt_get_counter();
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rtt_counter.alarm = alarm;
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rtt_counter.alarm_cb = cb;
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rtt_counter.alarm_arg = arg;
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DEBUG("%s alarm=%u @rtt=%u\n", __func__, alarm, counter);
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_rtt_update_hw_alarm();
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}
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void rtt_clear_alarm(void)
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{
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/* clear the alarm */
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rtt_counter.alarm = 0;
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rtt_counter.alarm_cb = NULL;
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rtt_counter.alarm_arg = NULL;
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DEBUG("%s @rtt=%u\n", __func__, (uint32_t)_rtt_hw->get_counter());
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_rtt_update_hw_alarm();
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}
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uint32_t rtt_get_alarm(void)
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{
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return rtt_counter.alarm;
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}
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void rtt_save_counter(void)
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{
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_rtt_hw->save_counter();
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}
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void rtt_restore_counter(bool in_init)
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{
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_rtt_hw->restore_counter(in_init);
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}
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uint64_t rtt_pm_sleep_enter(unsigned mode)
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{
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rtt_save_counter();
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if (!rtt_counter.alarm_set) {
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return 0;
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}
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uint32_t counter = rtt_get_counter();
|
||||
uint64_t t_diff = RTT_TICKS_TO_US(rtt_counter.alarm_active - counter);
|
||||
|
||||
DEBUG("%s rtt_alarm=%u @rtt=%u t_diff=%llu\n", __func__,
|
||||
rtt_counter.alarm_active, counter, t_diff);
|
||||
|
||||
if (t_diff) {
|
||||
rtt_counter.wakeup = true;
|
||||
esp_sleep_enable_timer_wakeup(t_diff);
|
||||
}
|
||||
else {
|
||||
rtt_counter.wakeup = false;
|
||||
}
|
||||
|
||||
return t_diff;
|
||||
}
|
||||
|
||||
void rtt_pm_sleep_exit(uint32_t cause)
|
||||
{
|
||||
rtt_restore_counter(false);
|
||||
|
||||
if (cause == ESP_SLEEP_WAKEUP_TIMER) {
|
||||
_rtt_isr(NULL);
|
||||
}
|
||||
}
|
||||
|
||||
static void _rtt_update_hw_alarm(void)
|
||||
{
|
||||
if (rtt_counter.alarm_cb && ((rtt_counter.alarm > rtt_get_counter()) ||
|
||||
(rtt_counter.overflow_cb == NULL))) {
|
||||
/* alarm is the next event if either the alarm is greater than the
|
||||
current counter value or the overflow callback is not set. */
|
||||
rtt_counter.alarm_active = rtt_counter.alarm;
|
||||
rtt_counter.alarm_set = true;
|
||||
_rtt_hw->set_alarm(rtt_counter.alarm - _rtt_offset, _rtt_isr, NULL);
|
||||
}
|
||||
else if (rtt_counter.overflow_cb) {
|
||||
/* otherwise the overflow is the next event if its callback is set */
|
||||
rtt_counter.alarm_active = 0;
|
||||
rtt_counter.alarm_set = true;
|
||||
_rtt_hw->set_alarm(0 - _rtt_offset, _rtt_isr, NULL);
|
||||
}
|
||||
else {
|
||||
rtt_counter.alarm_set = false;
|
||||
_rtt_hw->clear_alarm();
|
||||
}
|
||||
}
|
||||
|
||||
static void IRAM_ATTR _rtt_isr(void *arg)
|
||||
{
|
||||
DEBUG("%s\n", __func__);
|
||||
|
||||
uint32_t alarm = rtt_counter.alarm_active;
|
||||
|
||||
if (rtt_counter.wakeup) {
|
||||
rtt_counter.wakeup = false;
|
||||
DEBUG("%s wakeup alarm alarm=%u rtt_alarm=%u @rtt=%u\n",
|
||||
__func__, alarm, rtt_counter.alarm_active, rtt_get_counter());
|
||||
}
|
||||
|
||||
if ((alarm == rtt_counter.alarm) && rtt_counter.alarm_cb) {
|
||||
DEBUG("%s alarm\n", __func__);
|
||||
rtt_cb_t alarm_cb = rtt_counter.alarm_cb;
|
||||
void * alarm_arg = rtt_counter.alarm_arg;
|
||||
/* clear the alarm first, includes setting next alarm to overflow */
|
||||
rtt_clear_alarm();
|
||||
/* call the alarm handler afterwards if a callback is set */
|
||||
if (alarm_cb) {
|
||||
alarm_cb(alarm_arg);
|
||||
}
|
||||
}
|
||||
|
||||
if (alarm == 0) {
|
||||
DEBUG("%s overflow\n", __func__);
|
||||
/* set next alarm which is either an alarm if configured or overflow */
|
||||
_rtt_update_hw_alarm();
|
||||
/* call the overflow handler if set */
|
||||
if (rtt_counter.overflow_cb) {
|
||||
rtt_counter.overflow_cb(rtt_counter.overflow_arg);
|
||||
}
|
||||
}
|
||||
|
||||
DEBUG("%s next rtt=%u\n", __func__, rtt_counter.alarm_active);
|
||||
}
|
||||
|
||||
uint32_t _rtt_hw_to_rtt_counter(uint32_t hw_counter)
|
||||
{
|
||||
return hw_counter + _rtt_offset;
|
||||
}
|
||||
192
cpu/esp32/periph/rtt_hw_rtc.c
Normal file
192
cpu/esp32/periph/rtt_hw_rtc.c
Normal file
@ -0,0 +1,192 @@
|
||||
/*
|
||||
* Copyright (C) 2020 Gunar Schorcht
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser
|
||||
* General Public License v2.1. See the file LICENSE in the top level
|
||||
* directory for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_esp32
|
||||
* @ingroup drivers_periph_rtt
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Low-level RTT driver implementation for ESP32
|
||||
*
|
||||
* @author Gunar Schorcht <gunar@schorcht.net>
|
||||
*
|
||||
* @}
|
||||
*/
|
||||
|
||||
#include "cpu.h"
|
||||
#include "esp_attr.h"
|
||||
#include "esp/common_macros.h"
|
||||
#include "esp_common.h"
|
||||
#include "esp_sleep.h"
|
||||
#include "irq_arch.h"
|
||||
#include "log.h"
|
||||
#include "periph/rtt.h"
|
||||
#include "rtt_arch.h"
|
||||
#include "soc/dport_reg.h"
|
||||
#include "soc/rtc_cntl_struct.h"
|
||||
#include "syscalls.h"
|
||||
#include "timex.h"
|
||||
|
||||
#define ENABLE_DEBUG (0)
|
||||
#include "debug.h"
|
||||
|
||||
#define RTC_CLK_CAL_FRACT 19 /* fractional bits of calibration value */
|
||||
|
||||
typedef struct {
|
||||
uint32_t alarm_set; /**< alarm set at interface */
|
||||
rtt_cb_t alarm_cb; /**< alarm callback */
|
||||
void *alarm_arg; /**< argument for alarm callback */
|
||||
} _rtc_alarm_t;
|
||||
|
||||
static _rtc_alarm_t _rtc_alarm;
|
||||
|
||||
/* we can't include soc/rtc.h because of rtc_init declaration conflicts */
|
||||
extern uint32_t esp_clk_slowclk_cal_get(void);
|
||||
|
||||
/* convert hardware counter to 32-bit RTT counter */
|
||||
uint32_t _rtt_hw_to_rtt_counter(uint32_t hw_counter);
|
||||
|
||||
static void IRAM _rtc_isr(void *arg);
|
||||
|
||||
/* converts a 48-bit RTC counter value to microseconds */
|
||||
uint64_t _rtc_counter_to_us(uint64_t raw)
|
||||
{
|
||||
const uint32_t cal = esp_clk_slowclk_cal_get();
|
||||
return ((((raw >> 32) * cal) << (32 - RTC_CLK_CAL_FRACT)) + /* high part */
|
||||
(((raw & 0xffffffff) * cal) >> RTC_CLK_CAL_FRACT)); /* low part */
|
||||
}
|
||||
|
||||
static void _rtc_init(void)
|
||||
{
|
||||
}
|
||||
|
||||
static void _rtc_poweron(void)
|
||||
{
|
||||
/* route all interrupt sources to the same RTT level type interrupt */
|
||||
intr_matrix_set(PRO_CPU_NUM, ETS_RTC_CORE_INTR_SOURCE, CPU_INUM_RTC);
|
||||
|
||||
/* set interrupt handler and enable the CPU interrupt */
|
||||
xt_set_interrupt_handler(CPU_INUM_RTC, _rtc_isr, NULL);
|
||||
xt_ints_on(BIT(CPU_INUM_RTC));
|
||||
}
|
||||
|
||||
static void _rtc_poweroff(void)
|
||||
{
|
||||
/* reset interrupt handler and disable the CPU interrupt */
|
||||
xt_ints_off(BIT(CPU_INUM_RTC));
|
||||
xt_set_interrupt_handler(CPU_INUM_RTC, NULL, NULL);
|
||||
}
|
||||
|
||||
uint64_t _rtc_get_counter(void)
|
||||
{
|
||||
/* trigger timer register update */
|
||||
RTCCNTL.time_update.update = 1;
|
||||
/* wait until values in registers are valid */
|
||||
while (!RTCCNTL.time_update.valid) {
|
||||
ets_delay_us(1);
|
||||
}
|
||||
/* read the time from 48-bit counter and return */
|
||||
return (((uint64_t)RTCCNTL.time1.val) << 32) + RTCCNTL.time0;
|
||||
}
|
||||
|
||||
static void _rtc_set_alarm(uint32_t alarm, rtt_cb_t cb, void *arg)
|
||||
{
|
||||
/* compute the time difference for 32.768 kHz as 32-bit value */
|
||||
uint64_t rtc_counter = _rtc_get_counter();
|
||||
uint32_t rtt_diff = alarm - rtc_counter;
|
||||
|
||||
/* use computed time difference directly to set the RTC counter alarm */
|
||||
uint64_t rtc_alarm = (rtc_counter + rtt_diff) & RTT_HW_COUNTER_MAX;
|
||||
|
||||
DEBUG("%s alarm=%u rtt_diff=%u rtc_alarm=%llu @rtc=%llu\n",
|
||||
__func__, alarm, rtt_diff, rtc_alarm, rtc_counter);
|
||||
|
||||
/* save the alarm configuration for interrupt handling */
|
||||
_rtc_alarm.alarm_set = alarm;
|
||||
_rtc_alarm.alarm_cb = cb;
|
||||
_rtc_alarm.alarm_arg = arg;
|
||||
|
||||
/* set the timer value */
|
||||
RTCCNTL.slp_timer0 = rtc_alarm & 0xffffffff;
|
||||
RTCCNTL.slp_timer1.slp_val_hi = rtc_alarm >> 32;
|
||||
|
||||
DEBUG("%s %08x%08x \n", __func__,
|
||||
RTCCNTL.slp_timer1.slp_val_hi, RTCCNTL.slp_timer0);
|
||||
|
||||
/* enable RTC timer alarm */
|
||||
RTCCNTL.slp_timer1.main_timer_alarm_en = 1;
|
||||
|
||||
/* clear and enable RTC timer interrupt */
|
||||
RTCCNTL.int_clr.rtc_main_timer = 1;
|
||||
RTCCNTL.int_ena.rtc_main_timer = 1;
|
||||
}
|
||||
|
||||
static void _rtc_clear_alarm(void)
|
||||
{
|
||||
/* disable alarms first */
|
||||
RTCCNTL.slp_timer1.main_timer_alarm_en = 0;
|
||||
|
||||
/* clear the bit in interrupt enable and status register */
|
||||
RTCCNTL.int_clr.rtc_main_timer = 0;
|
||||
RTCCNTL.int_ena.rtc_main_timer = 0;
|
||||
|
||||
/* reset the alarm configuration for interrupt handling */
|
||||
_rtc_alarm.alarm_set = 0;
|
||||
_rtc_alarm.alarm_cb = NULL;
|
||||
_rtc_alarm.alarm_arg = NULL;
|
||||
}
|
||||
|
||||
static void _rtc_save_counter(void)
|
||||
{
|
||||
}
|
||||
|
||||
static void _rtc_restore_counter(bool in_init)
|
||||
{
|
||||
(void)in_init;
|
||||
}
|
||||
|
||||
static void IRAM _rtc_isr(void *arg)
|
||||
{
|
||||
/* disable alarms first */
|
||||
RTCCNTL.slp_timer1.main_timer_alarm_en = 0;
|
||||
|
||||
/* clear the bit in interrupt enable and status register */
|
||||
RTCCNTL.int_clr.rtc_main_timer = 0;
|
||||
RTCCNTL.int_ena.rtc_main_timer = 0;
|
||||
|
||||
/* save the lower 32 bit of the current counter value */
|
||||
uint32_t counter = _rtc_get_counter();
|
||||
|
||||
DEBUG("%s %u\n", __func__, counter);
|
||||
|
||||
if (_rtc_alarm.alarm_cb) {
|
||||
DEBUG("%s alarm %u\n", __func__, counter);
|
||||
|
||||
rtt_cb_t alarm_cb = _rtc_alarm.alarm_cb;
|
||||
void *alarm_arg = _rtc_alarm.alarm_arg;
|
||||
|
||||
/* clear the alarm first */
|
||||
_rtc_alarm.alarm_cb = NULL;
|
||||
_rtc_alarm.alarm_arg = NULL;
|
||||
|
||||
/* call the alarm handler afterwards if callback was defined */
|
||||
alarm_cb(alarm_arg);
|
||||
}
|
||||
}
|
||||
|
||||
const rtt_hw_driver_t _rtt_hw_rtc_driver = {
|
||||
.init = _rtc_init,
|
||||
.get_counter = _rtc_get_counter,
|
||||
.set_alarm = _rtc_set_alarm,
|
||||
.clear_alarm = _rtc_clear_alarm,
|
||||
.poweron = _rtc_poweron,
|
||||
.poweroff = _rtc_poweroff,
|
||||
.save_counter = _rtc_save_counter,
|
||||
.restore_counter = _rtc_restore_counter,
|
||||
};
|
||||
219
cpu/esp32/periph/rtt_hw_sys.c
Normal file
219
cpu/esp32/periph/rtt_hw_sys.c
Normal file
@ -0,0 +1,219 @@
|
||||
/*
|
||||
* Copyright (C) 2020 Gunar Schorcht
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser
|
||||
* General Public License v2.1. See the file LICENSE in the top level
|
||||
* directory for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_esp32
|
||||
* @ingroup drivers_periph_rtt
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Low-level RTT driver implementation for ESP32
|
||||
*
|
||||
* @author Gunar Schorcht <gunar@schorcht.net>
|
||||
*
|
||||
* @}
|
||||
*/
|
||||
|
||||
#include "cpu.h"
|
||||
#include "esp_attr.h"
|
||||
#include "esp/common_macros.h"
|
||||
#include "esp_sleep.h"
|
||||
#include "irq_arch.h"
|
||||
#include "log.h"
|
||||
#include "periph/rtt.h"
|
||||
#include "rtt_arch.h"
|
||||
#include "soc/timer_group_struct.h"
|
||||
#include "syscalls.h"
|
||||
#include "timex.h"
|
||||
|
||||
#define ENABLE_DEBUG (0)
|
||||
#include "debug.h"
|
||||
|
||||
#define TIMER_SYSTEM_GROUP TIMERG0
|
||||
#define TIMER_SYSTEM_INT_MASK BIT(0)
|
||||
#define TIMER_SYSTEM_INT_SRC ETS_TG0_T0_LEVEL_INTR_SOURCE
|
||||
|
||||
#define SYS_US_TO_TICKS(us) ((((uint64_t)us) << 15) / US_PER_SEC)
|
||||
#define SYS_TICKS_TO_US(cnt) (((uint64_t)cnt * US_PER_SEC) >> 15)
|
||||
|
||||
typedef struct {
|
||||
uint32_t alarm_set; /**< alarm set at interface */
|
||||
rtt_cb_t alarm_cb; /**< alarm callback */
|
||||
void *alarm_arg; /**< argument for alarm callback */
|
||||
} _sys_alarm_t;
|
||||
|
||||
static _sys_alarm_t _sys_alarm;
|
||||
|
||||
/* variables used to save counters during sleep or reboot */
|
||||
static uint64_t RTC_BSS_ATTR _rtc_counter_saved;
|
||||
static uint64_t RTC_BSS_ATTR _sys_counter_saved;
|
||||
|
||||
/* the offset of the system time to the RTC time in microseconds */
|
||||
static uint64_t _sys_counter_offset;
|
||||
|
||||
/* forward declarations of functions required from RTC counter */
|
||||
extern uint64_t _rtc_get_counter(void);
|
||||
extern uint64_t _rtc_counter_to_us(uint64_t raw);
|
||||
|
||||
static void IRAM _sys_isr(void *arg);
|
||||
|
||||
static void _sys_init(void)
|
||||
{
|
||||
}
|
||||
|
||||
static void _sys_poweron(void)
|
||||
{
|
||||
/* route all interrupt sources to the same RTT level type interrupt */
|
||||
intr_matrix_set(PRO_CPU_NUM, TIMER_SYSTEM_INT_SRC, CPU_INUM_RTC);
|
||||
|
||||
/* set interrupt handler and enable the CPU interrupt */
|
||||
xt_set_interrupt_handler(CPU_INUM_RTC, _sys_isr, NULL);
|
||||
xt_ints_on(BIT(CPU_INUM_RTC));
|
||||
}
|
||||
|
||||
static void _sys_poweroff(void)
|
||||
{
|
||||
/* reset interrupt handler and disable the CPU interrupt */
|
||||
xt_ints_off(BIT(CPU_INUM_RTC));
|
||||
xt_set_interrupt_handler(CPU_INUM_RTC, NULL, NULL);
|
||||
}
|
||||
|
||||
static uint64_t _sys_get_counter(void)
|
||||
{
|
||||
/* convert the 64-bit microsecond system time to 48-bit 32.768 kHz time */
|
||||
return SYS_US_TO_TICKS(system_get_time_64() + _sys_counter_offset) & RTT_HW_COUNTER_MAX;
|
||||
}
|
||||
|
||||
static void _sys_set_alarm(uint32_t alarm, rtt_cb_t cb, void *arg)
|
||||
{
|
||||
/* compute the time difference for 32.768 kHz as 32-bit value */
|
||||
uint32_t rtt_diff = alarm - _sys_get_counter();
|
||||
|
||||
/*
|
||||
* convert the computed time difference for 32.768 kHz to a 64-bit
|
||||
* microsecond value and determine the alarm time for the 64-bit
|
||||
* microsecond system timer
|
||||
*/
|
||||
uint64_t _sys_diff = SYS_TICKS_TO_US(rtt_diff);
|
||||
uint64_t _sys_time = system_get_time_64();
|
||||
uint64_t _sys_alarm_time = _sys_time + _sys_diff;
|
||||
|
||||
DEBUG("%s alarm=%u rtt_diff=%u "
|
||||
"sys_diff=%llu sys_alarm=%llu @sys_time=%llu\n", __func__,
|
||||
alarm, rtt_diff, _sys_diff, _sys_alarm_time, _sys_time);
|
||||
|
||||
/* save the alarm configuration for interrupt handling */
|
||||
_sys_alarm.alarm_set = alarm;
|
||||
_sys_alarm.alarm_cb = cb;
|
||||
_sys_alarm.alarm_arg = arg;
|
||||
|
||||
/* set the timer value */
|
||||
TIMER_SYSTEM.alarm_high = (uint32_t)(_sys_alarm_time >> 32);
|
||||
TIMER_SYSTEM.alarm_low = (uint32_t)(_sys_alarm_time & 0xffffffff);
|
||||
|
||||
/* clear the bit in status and set the bit in interrupt enable */
|
||||
TIMER_SYSTEM_GROUP.int_clr_timers.val |= TIMER_SYSTEM_INT_MASK;
|
||||
TIMER_SYSTEM_GROUP.int_ena.val |= TIMER_SYSTEM_INT_MASK;
|
||||
|
||||
/* enable the timer alarm */
|
||||
TIMER_SYSTEM.config.level_int_en = 1;
|
||||
TIMER_SYSTEM.config.alarm_en = 1;
|
||||
}
|
||||
|
||||
static void _sys_clear_alarm(void)
|
||||
{
|
||||
/* disable alarms first */
|
||||
TIMER_SYSTEM.config.level_int_en = 0;
|
||||
TIMER_SYSTEM.config.alarm_en = 0;
|
||||
|
||||
/* clear the bit in interrupt enable and status register */
|
||||
TIMER_SYSTEM_GROUP.int_ena.val &= ~TIMER_SYSTEM_INT_MASK;
|
||||
TIMER_SYSTEM_GROUP.int_clr_timers.val |= TIMER_SYSTEM_INT_MASK;
|
||||
|
||||
/* reset the alarm configuration for interrupt handling */
|
||||
_sys_alarm.alarm_set = 0;
|
||||
_sys_alarm.alarm_cb = NULL;
|
||||
_sys_alarm.alarm_arg = NULL;
|
||||
}
|
||||
|
||||
static void _sys_save_counter(void)
|
||||
{
|
||||
critical_enter();
|
||||
|
||||
/* save counters for synchronization after wakeup or reboot */
|
||||
_rtc_counter_saved = _rtc_get_counter();
|
||||
_sys_counter_saved = system_get_time_64() + _sys_counter_offset;
|
||||
|
||||
critical_exit();
|
||||
|
||||
DEBUG("%s rtc_time_saved=%llu sys_time_saved=%llu\n", __func__,
|
||||
_rtc_counter_saved, _sys_counter_saved);
|
||||
}
|
||||
|
||||
static void _sys_restore_counter(bool in_init)
|
||||
{
|
||||
critical_enter();
|
||||
|
||||
/* synchronize RTC counter and the 64-bit microsecond system timer */
|
||||
uint64_t _rtc_time_diff = _rtc_get_counter() - _rtc_counter_saved;
|
||||
_sys_counter_offset += _rtc_counter_to_us(_rtc_time_diff & RTT_HW_COUNTER_MAX);
|
||||
_sys_counter_offset += (in_init) ? _sys_counter_saved : 0;
|
||||
|
||||
critical_exit();
|
||||
|
||||
DEBUG("%s rtc_time_saved=%llu rtc_time_diff=%llu "
|
||||
"sys_time_saved=%llu sys_time_offset=%llu\n", __func__,
|
||||
_rtc_counter_saved, _rtc_time_diff,
|
||||
_sys_counter_saved, _sys_counter_offset);
|
||||
}
|
||||
|
||||
static void IRAM _sys_isr(void *arg)
|
||||
{
|
||||
if (!(TIMER_SYSTEM_GROUP.int_st_timers.val & TIMER_SYSTEM_INT_MASK)) {
|
||||
/* return in case of another timer interrupt */
|
||||
return;
|
||||
}
|
||||
|
||||
/* disable alarms first */
|
||||
TIMER_SYSTEM.config.level_int_en = 0;
|
||||
TIMER_SYSTEM.config.alarm_en = 0;
|
||||
|
||||
/* clear the bit in interrupt enable and status register */
|
||||
TIMER_SYSTEM_GROUP.int_ena.val &= ~TIMER_SYSTEM_INT_MASK;
|
||||
TIMER_SYSTEM_GROUP.int_clr_timers.val |= TIMER_SYSTEM_INT_MASK;
|
||||
|
||||
/* save the lower 32 bit of the current counter value */
|
||||
uint32_t counter = _sys_get_counter();
|
||||
|
||||
DEBUG("%s %u\n", __func__, counter);
|
||||
|
||||
if (_sys_alarm.alarm_cb) {
|
||||
DEBUG("%s alarm %u\n", __func__, counter);
|
||||
|
||||
rtt_cb_t alarm_cb = _sys_alarm.alarm_cb;
|
||||
void *alarm_arg = _sys_alarm.alarm_arg;
|
||||
|
||||
/* clear the alarm first */
|
||||
_sys_alarm.alarm_cb = NULL;
|
||||
_sys_alarm.alarm_arg = NULL;
|
||||
|
||||
/* call the alarm handler afterwards if callback was defined */
|
||||
alarm_cb(alarm_arg);
|
||||
}
|
||||
}
|
||||
|
||||
const rtt_hw_driver_t _rtt_hw_sys_driver = {
|
||||
.init = _sys_init,
|
||||
.get_counter = _sys_get_counter,
|
||||
.set_alarm = _sys_set_alarm,
|
||||
.clear_alarm = _sys_clear_alarm,
|
||||
.poweron = _sys_poweron,
|
||||
.poweroff = _sys_poweroff,
|
||||
.save_counter = _sys_save_counter,
|
||||
.restore_counter = _sys_restore_counter,
|
||||
};
|
||||
Loading…
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Reference in New Issue
Block a user