seeedstudio-gd32: Initial include of board

The seeedstudio-gd32 is an small development board based on the
gd32vf103 MCU

Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>

boards/seeedstudio-gd32/Kconfig

@@ -0,0 +1,16 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config BOARD
+    default "seeedstudio-gd32" if BOARD_SEEEDSTUDIO_GD32
+
+config BOARD_SEEEDSTUDIO_GD32
+    bool
+    default y
+    select CPU_MODEL_GD32VF103VBT6
+    select HAS_PERIPH_TIMER
+    select HAS_PERIPH_UART

boards/seeedstudio-gd32/Makefile

@@ -0,0 +1,3 @@
+MODULE = board
+
+include $(RIOTBASE)/Makefile.base

boards/seeedstudio-gd32/Makefile.features

@@ -0,0 +1,6 @@
+CPU = gd32v
+CPU_MODEL = gd32vf103vbt6
+
+# Put defined MCU peripherals here (in alphabetical order)
+FEATURES_PROVIDED += periph_timer
+FEATURES_PROVIDED += periph_uart

boards/seeedstudio-gd32/Makefile.include

@@ -0,0 +1,2 @@
+PROGRAMMER ?= openocd
+OPENOCD_RESET_USE_CONNECT_ASSERT_SRST=1

boards/seeedstudio-gd32/board.c

@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2020 Koen Zandberg <koen@bergzand.net>
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser General
+ * Public License v2.1. See the file LICENSE in the top level directory for more
+ * details.
+ */
+
+/**
+ * @ingroup     boards_seeedstudio-gd32
+ * @{
+ *
+ * @file
+ * @brief       Support for the SeeedStudio GD32 RISC-V board
+ *
+ * @author      Koen Zandberg <koen@bergzand.net>
+ *
+ * @}
+ */
+
+#include "cpu.h"
+#include "board.h"
+
+void board_init(void)
+{
+    /* Initialize CPU and clocks */
+    cpu_init();
+}

boards/seeedstudio-gd32/dist/openocd.cfg

@@ -0,0 +1,12 @@
+adapter driver ftdi
+adapter speed     10000
+ftdi_vid_pid 0x0403 0x6010
+adapter srst pulse_width 10
+reset_config srst_only srst_open_drain
+
+ftdi_layout_init 0x0020 0x001b
+ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020
+
+source [find target/gd32vf103.cfg]
+
+flash bank $_CHIPNAME.flash gd32vf103 0x08000000 0 0 0 $_TARGETNAME

boards/seeedstudio-gd32/include/board.h

@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2020 Koen Zandberg <koen@bergzand.net>
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @defgroup    boards_seeedstudio-gd32 SeeedStudio GD32 RISC-V board
+ * @ingroup     boards
+ * @brief       Support for the SeeedStudio GD32 RISC-V board
+ * @{
+ *
+ * @file
+ * @brief       Board specific definitions for the SeeedStudio GD32 RISC-V board
+ *
+ * @author      Koen Zandberg <koen@bergzand.net>
+ */
+
+#ifndef BOARD_H
+#define BOARD_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "macros/units.h"
+
+/**
+ * @name    Xtimer configuration
+ * @{
+ */
+#define XTIMER_HZ                   MHZ(1)
+#define XTIMER_WIDTH                (16)
+/** @} */
+
+/**
+ * @brief   Initialize board specific hardware
+ */
+void board_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H */
+/** @} */

boards/seeedstudio-gd32/include/periph_conf.h

@@ -0,0 +1,89 @@
+/*
+ * Copyright (C) 2020 Koen Zandberg <koen@bergzand.net>
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_seeedstudio-gd32
+ * @{
+ *
+ * @file
+ * @brief       Board specific definitions for the SeeedStudio GD32 RISC-V board
+ *
+ * @author      Koen Zandberg <koen@bergzand.net>
+ */
+
+#ifndef PERIPH_CONF_H
+#define PERIPH_CONF_H
+
+#include "macros/units.h"
+#include "periph_cpu.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* This board provides an high frequency oscillator */
+#ifndef CONFIG_BOARD_HAS_HXTAL
+#define CONFIG_BOARD_HAS_HXTAL        1
+#endif
+
+#define CLOCK_HXTAL         MHZ(8)             /**< HXTAL frequency */
+#define CLOCK_CORECLOCK     MHZ(104)           /**< CPU clock frequency in Hz */
+
+/**
+ * @name   Timer configuration
+ * @{
+ */
+static const timer_conf_t timer_config[] = {
+    {
+        .dev      = TIMER2,
+        .max      = 0x0000ffff,
+        .rcu_mask = RCU_APB1EN_TIMER2EN_Msk,
+        .bus      = APB1,
+        .irqn     = TIMER2_IRQn
+    },
+    {
+        .dev      = TIMER3,
+        .max      = 0x0000ffff,
+        .rcu_mask = RCU_APB1EN_TIMER3EN_Msk,
+        .bus      = APB1,
+        .irqn     = TIMER3_IRQn
+    }
+};
+
+#define TIMER_0_IRQN        TIMER2_IRQn
+#define TIMER_1_IRQN        TIMER3_IRQn
+
+#define TIMER_NUMOF         ARRAY_SIZE(timer_config)
+/** @} */
+
+/**
+ * @name   UART configuration
+ * @{
+ */
+static const uart_conf_t uart_config[] = {
+    {
+        .dev        = USART0,
+        .rcu_mask   = RCU_APB2EN_USART0EN_Msk,
+        .rx_pin     = GPIO_PIN(PORT_A, 10),
+        .tx_pin     = GPIO_PIN(PORT_A, 9),
+        .bus        = APB2,
+        .irqn       = USART0_IRQn,
+    },
+};
+
+#define UART_0_IRQN         USART0_IRQn
+
+#define UART_NUMOF          ARRAY_SIZE(uart_config)
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PERIPH_CONF_H */
+/** @} */

examples/dtls-wolfssl/Makefile.ci

@@ -31,6 +31,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     samd10-xmini \
     saml10-xpro \
     saml11-xpro \
+    seeedstudio-gd32 \
     slstk3400a \
     spark-core \
     stk3200 \

examples/javascript/Makefile.ci

@@ -46,6 +46,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     samd10-xmini \
     saml10-xpro \
     saml11-xpro \
+    seeedstudio-gd32 \
     slstk3400a \
     spark-core \
     stk3200 \

tests/pkg_utensor/Makefile.ci

@@ -36,6 +36,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     samd10-xmini \
     saml10-xpro \
     saml11-xpro \
+    seeedstudio-gd32 \
     slstk3400a \
     spark-core \
     stk3200 \

tests/unittests/Makefile.ci

@@ -92,6 +92,7 @@ BOARD_INSUFFICIENT_MEMORY := \
     samr21-xpro \
     samr30-xpro \
     samr34-xpro \
+    seeedstudio-gd32 \
     sensebox_samd21 \
     slstk3400a \
     slstk3401a \