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boards/fox: adapted to timer changes

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This commit is contained in:
Hauke Petersen 2016-03-01 14:09:52 +01:00
parent 652b1ffef5
commit f94b47c9d7
2 changed files with 15 additions and 29 deletions
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5
boards/fox/include/board.h
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@ -33,6 +33,11 @@
extern "C" { extern "C" {
#endif #endif
/**
* @name Tell the xtimer that we use a 16-bit peripheral timer
*/
#define XTIMER_MASK (0xffff0000)
/** /**
* @name Define the interface to the AT86RF231 radio * @name Define the interface to the AT86RF231 radio
* *

39
boards/fox/include/periph_conf.h
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@ -19,6 +19,8 @@
#ifndef PERIPH_CONF_H_ #ifndef PERIPH_CONF_H_
#define PERIPH_CONF_H_ #define PERIPH_CONF_H_
#include "periph_cpu.h"
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
@ -45,37 +47,16 @@ extern "C" {
* @brief Timer configuration * @brief Timer configuration
* @{ * @{
*/ */
#define TIMER_NUMOF (2U) static const timer_conf_t timer_config[] = {
#define TIMER_0_EN 1 /* device, APB bus, rcc_bit */
#define TIMER_1_EN 1 { TIM2, APB1, RCC_APB1ENR_TIM2EN, TIM2_IRQn },
{ TIM3, APB1, RCC_APB1ENR_TIM3EN, TIM3_IRQn }
};
/* Timer 0 configuration */ #define TIMER_0_ISR isr_tim2
#define TIMER_0_DEV_0 TIM2 #define TIMER_1_ISR isr_tim3
#define TIMER_0_DEV_1 TIM3
#define TIMER_0_CHANNELS 4
#define TIMER_0_FREQ (CLOCK_CORECLOCK)
#define TIMER_0_MAX_VALUE (0xffff)
#define TIMER_0_CLKEN() (RCC->APB1ENR |= (RCC_APB1ENR_TIM2EN | RCC_APB1ENR_TIM3EN))
#define TIMER_0_ISR_0 isr_tim2
#define TIMER_0_ISR_1 isr_tim3
#define TIMER_0_IRQ_CHAN_0 TIM2_IRQn
#define TIMER_0_IRQ_CHAN_1 TIM3_IRQn
#define TIMER_0_IRQ_PRIO 1
#define TIMER_0_TRIG_SEL TIM_SMCR_TS_0
/* Timer 1 configuration */ #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
#define TIMER_1_DEV_0 TIM4
#define TIMER_1_DEV_1 TIM5
#define TIMER_1_CHANNELS 4
#define TIMER_1_FREQ (CLOCK_CORECLOCK)
#define TIMER_1_MAX_VALUE (0xffff)
#define TIMER_1_CLKEN() (RCC->APB1ENR |= (RCC_APB1ENR_TIM4EN | RCC_APB1ENR_TIM5EN))
#define TIMER_1_ISR_0 isr_tim4
#define TIMER_1_ISR_1 isr_tim5
#define TIMER_1_IRQ_CHAN_0 TIM4_IRQn
#define TIMER_1_IRQ_CHAN_1 TIM5_IRQn
#define TIMER_1_IRQ_PRIO 1
#define TIMER_1_TRIG_SEL TIM_SMCR_TS_1
/** @} */ /** @} */
/** /**