diff --git a/cpu/cc13x2/Makefile.include b/cpu/cc13x2/Makefile.include
index c0379f895a..74b9c6a443 100644
--- a/cpu/cc13x2/Makefile.include
+++ b/cpu/cc13x2/Makefile.include
@@ -3,5 +3,12 @@ CPU_VARIANT = x2
 
 VECTORS_O = $(BINDIR)/cc26xx_cc13xx/vectors.o
 
+ROM_START_ADDR ?= 0x00000000
+RAM_START_ADDR ?= 0x20000000
+ROM_LEN ?= 352K
+RAM_LEN ?= 20K
+
+LINKER_SCRIPT ?= cortexm.ld
+
 include ${RIOTCPU}/cc26xx_cc13xx/Makefile.include
 include $(RIOTMAKE)/arch/cortexm.inc.mk
diff --git a/cpu/cc13x2/ldscripts/cc1352r1.ld b/cpu/cc13x2/ldscripts/cc1352r1.ld
deleted file mode 100644
index 7cdad64b71..0000000000
--- a/cpu/cc13x2/ldscripts/cc1352r1.ld
+++ /dev/null
@@ -1,19 +0,0 @@
-/**
- * @addtogroup      cpu_cc13x2
- * @{
- *
- * @file
- * @brief           linker script for cc13x2 MCUs
- *
- * @}
- */
-
-/* Memory Space Definitions: */
-MEMORY
-{
-    rom (rx)   : ORIGIN = 0x00000000, LENGTH = 0x58000
-    gpram      : ORIGIN = 0x11000000, LENGTH = 8K /* configurable as cache. 20K here, 8K there, and 2K in the ld-script of cc13x2ware */
-    ram (w!rx) : ORIGIN = 0x20000000, LENGTH = 20K /* sram */
-}
-
-INCLUDE cortexm_base.ld
diff --git a/cpu/cc26x0/Makefile.include b/cpu/cc26x0/Makefile.include
index 5fbb3f284c..57e8be0e93 100644
--- a/cpu/cc26x0/Makefile.include
+++ b/cpu/cc26x0/Makefile.include
@@ -3,5 +3,13 @@ CPU_VARIANT = x0
 
 VECTORS_O = $(BINDIR)/cc26xx_cc13xx/vectors.o
 
+ROM_START_ADDR ?= 0x00000000
+RAM_START_ADDR ?= 0x20000000
+
+ROM_LEN ?= 128K
+RAM_LEN ?= 20K
+
+LINKER_SCRIPT ?= cortexm.ld
+
 include ${RIOTCPU}/cc26xx_cc13xx/Makefile.include
 include $(RIOTMAKE)/arch/cortexm.inc.mk
diff --git a/cpu/cc26x0/ldscripts/cc26x0f128.ld b/cpu/cc26x0/ldscripts/cc26x0f128.ld
deleted file mode 100644
index a683c57002..0000000000
--- a/cpu/cc26x0/ldscripts/cc26x0f128.ld
+++ /dev/null
@@ -1,19 +0,0 @@
-/**
- * @addtogroup      cpu_cc26x0
- * @{
- *
- * @file
- * @brief           linker script for cc26x0f128 MCUs
- *
- * @}
- */
-
-/* Memory Space Definitions: */
-MEMORY
-{
-    rom (rx)   : ORIGIN = 0x00000000, LENGTH = 0x00020000 - 88 /* technically, it's 128K */
-    gpram      : ORIGIN = 0x11000000, LENGTH = 8K /* configurable as cache. 20K here, 8K there, and 2K in the ld-script of cc26x0ware */
-    ram (w!rx) : ORIGIN = 0x20000000, LENGTH = 20K /* sram */
-}
-
-INCLUDE cortexm_base.ld