From faa65f34bd8248a9ccd9af6293043a9e86c17ef3 Mon Sep 17 00:00:00 2001
From: Alexandre Abadie <alexandre.abadie@inria.fr>
Date: Wed, 16 May 2018 09:32:49 +0200
Subject: [PATCH] tests/periph_flashpage: ensure page_mem is correctly aligned

---
 tests/periph_flashpage/main.c | 36 ++++++++++++++++++++++-------------
 1 file changed, 23 insertions(+), 13 deletions(-)

diff --git a/tests/periph_flashpage/main.c b/tests/periph_flashpage/main.c
index a7d8bdddb3..54ffcbbdfa 100644
--- a/tests/periph_flashpage/main.c
+++ b/tests/periph_flashpage/main.c
@@ -27,25 +27,28 @@
 
 #define LINE_LEN            (16)
 
-/**
- * @brief   Allocate space for 1 flash page in RAM
- */
-static uint8_t page_mem[FLASHPAGE_SIZE];
-
+/* When writing raw bytes on flash, data must be correctly aligned. */
 #ifdef MODULE_PERIPH_FLASHPAGE_RAW
+#define ALIGNMENT_ATTR __attribute__ ((aligned (FLASHPAGE_RAW_ALIGNMENT)))
+
 /*
  * @brief   Allocate an aligned buffer for raw writings
  */
-static char raw_buf[64] __attribute__ ((aligned (FLASHPAGE_RAW_ALIGNMENT)));
-
-static uint32_t getaddr(const char *str)
-{
-    uint32_t addr = strtol(str, NULL, 16);
-
-    return addr;
-}
+static char raw_buf[64] ALIGNMENT_ATTR;
+#else
+#define ALIGNMENT_ATTR
 #endif
 
+/**
+ * @brief   Allocate space for 1 flash page in RAM
+ *
+ * @note    The flash page in RAM must be correctly aligned, even in RAM, when
+ *          using flashpage_raw. This is because some architecture uses
+ *          32 bit alignment implicitly and there are cases (stm32l4) that
+ *          requires 64 bit alignment.
+ */
+static uint8_t page_mem[FLASHPAGE_SIZE] ALIGNMENT_ATTR;
+
 static int getpage(const char *str)
 {
     int page = atoi(str);
@@ -179,6 +182,13 @@ static int cmd_write(int argc, char **argv)
 }
 
 #ifdef MODULE_PERIPH_FLASHPAGE_RAW
+static uint32_t getaddr(const char *str)
+{
+    uint32_t addr = strtol(str, NULL, 16);
+
+    return addr;
+}
+
 static int cmd_write_raw(int argc, char **argv)
 {
     uint32_t addr;