In commit e90f2b439e37db7cce0bb929932aaef847830e24 the I2C config has been
adapted to the new I2C API. However, the pins of I2C_DEV(0) have been changed
from PB6 and PB7 to PB8 and PB9. While PB8 and PB9 also can be used for I2C1
by remapping I2C1, this is not done. As a result, I2C1 was unusable. This
commit restores the default I2C1 pins for I2C_DEV(0), resulting in I2C_DEV(0)
becoming usable again.
Remove first I2C that is not reachable from the pinout and is not connected to anything. Move I2C1 as the first I2C device.
Update FXOS8700 I2C device in board configuration
The STM32F103C8 secretly comes with 128KiB flash instead of 64KiB. Still, only
64KiB of it are tested and guaranteed to work. However, most of the times the
whole 128KiB flash works just fine. In the BluePill documentation this fact is
already documented and by using
$ make BOARD=bluepill CPU_MODEL=stm32f103cb
the whole 128 KiB can be used by RIOT. When using this hack routinely, it easier
to use environment variables instead. But allowing to overwrite CPU_MODEL via
environment variables seems to be a bad thing, as it is easy to forget to clear
that environment variable when changing the BOARD variable.
This commit introduces the new STM32F103C8_FLASH_HACK variable, which unlocks
the 128KiB FLASH when set to "1". The BluePill documentation has been updated
accordingly.
This adds a LED_PANIC macro which defines which LED,
or combination of LEDs should notify a panic error.
This is currently used to signal BADISR_vect errors.
Some ESP32 boards (like my SparkFun ESP32 Thing) have a main clock
crystal that runs at 26MHz, not 40MHz. RIOT appears to assume 40MHz.
The mismatch causes the UART to not sync properly, resulting in
garbage written to the terminal instead of log output.
I’ve added:
* A new board configuration constant ESP32_XTAL_FREQ that defaults
to 40, but can be overridden by a board def or at build time to
force a specific value (i.e. 26).
* Some code spliced into system_clk_init() to check this constant and
call rtc_clk_init() to set the correct frequency.
* A copy of the rtf_clk_init() function from the ESP-IDF sources.
Fixes#10272
The nucleo-l152re is the only stm32l1x supported board with
two flash banks according to openocd config. Thus, adding
the right config file makes the whole flash available.
