4 Commits

Author	SHA1	Message	Date
Koen Zandberg	32297a9818	fe310: Remove timer initialization from IRQ code ... The RISC-V timer should only be touched by periph/timer and must not be initialized and enabled by the IRQ code. The current code can cause an unhandled interrupt when the timer is not used and the mtime register hits UINT64_MAX.	2020-08-26 10:33:22 +02:00
Alexandre Abadie	3d9421571c	cpu/fe310: migrate to inlined irq API ... Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>	2020-06-26 10:48:56 +02:00
Alexandre Abadie	a953b74bc7	cpu/fe310: restore flash initialization in cpu_init	2020-01-10 16:51:10 +01:00
Alexandre Abadie	97e1c7ba7e	cpu/fe310: reorganize files and includes	2020-01-10 16:41:33 +01:00