- Enforced that ISR_STACKSIZE is indeed a multiple of 4
- With this enforced, every cast that triggers a -Wcast-align warning is now
a false positives, so those were silenced by (intermediately) casting to
`uintptr_t`.
This didn't change binaries for me. Either the linker script already took care
of it through the section names of the stacks, or I just was lucky. If I was
just luck, this fixes a bug. If not, it makes the hidden alignment explicit in
the C code, so that code review is easier.
This is an implementation of the ESP32 SoftAP mode using the
`esp_wifi_ap` pseudomodule.
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
> Allows flahsing CCFG configuration using Kconfig,
formely "make menuconfig".
> Supports cc26x0, cc26x2_cc13x2.
> Can be used to enable bootloader backdoor, to use
cc2538-bsl flashing script.
> Not all options are in Kconfig, most important ones,
others can be added in further commits.
> On cc13xx targets the VDDR high option can be enabled
using Kconfig.
> With this, RIOT can flash blank chips and the firmware
will run just fine.
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
This add a custom ldscript for cc26xx_cc13xx CPUs,
which allows linking CCFG configuration, usage of GPRAM,
etc.
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
The RTC on the fe310 is emulated using the RTT.
This only works if the RTT frequency is 1 Hz, so default to that
value in case `periph_rtc` is selected.
Use RTC helper functions instead of libc functions.
This gives us y2038 safety by the extended epoch and saves
a good chunk of memory:
picolibc mktime():
text data bss dec hex filename
15048 520 2504 18072 4698 tests/periph_rtc/bin/hifive1/tests_periph_rtc.elf
rtc_mktime():
text data bss dec hex filename
7632 40 2452 10124 278c tests/periph_rtc/bin/hifive1/tests_periph_rtc.elf
This modifies the cortex-m thread specifics to allow running the PendSV
interrupt continuously at lower priority and removes the priority
modifications during the interrupt itself. Interrupts are disabled
during the scheduling itself, but enabled briefly after the sleep to
ensure that they are handled if activated during the scheduling or the
sleep.
On samd5x only the RTC can wake the CPU from Deep Sleep (pm modes 0 & 1).
The external interrupt controller is disabled, but we can use the tamper
detection of the RTC.
If an gpio interrupt is configured on one of the five tamper detect pins,
those can be used to wake the CPU from Deep Sleep / Hibernate.
