4 Commits

Author	SHA1	Message	Date
Francisco Molina	c6e0e7adcb	cpu/stm32_common: add common L4 and WB stmclk	2020-03-25 09:29:57 +01:00
Francisco Molina	9fa0099d62	cpu/stm32wb: add flashpage support ... - Since flash access is shared with CPU2 we resize ROM_LEN according to CPU2 secure flash memmory area. - Add assert to prevent unauthorized reads from CPU2 secure flash area	2020-03-25 09:29:56 +01:00
Francisco Molina	66a8922f8c	cpu: initial support for stm32wb	2020-03-25 09:29:56 +01:00
Francisco Molina	0ee04bd6d6	cpu/stm32wb: add stm32wb55xx.h vendor file	2020-03-25 09:28:26 +01:00