In the `pwm_set` function, the switch-on and switch-off times for PWM channels were only determined for the following phase, but not for the current phase. This could result in a missing duty cycle when calling the function `pwm_set` if the switch-on time of the current phase was not yet reached or to an extended duty cycle if the switch-off time of the current phase had not yet been reached.
On cppcheck 1.82 it throws a warning.
Since it costs cycles and does nothing the ++dummy is (void)dummy.
A warning suppression is added so the CI is happy.
This fixes the positive result when master write data is NACKed.
This false positive occurs when the write frame is finished but a data nack occurred.
The AF check should occur first.
This commit fixes the clearing of a error condition after read.
This causes the incorrect errorcodes if the register is read
then an error occurs, then it is cleared.
By clearing only after the error is processed the bug is fixed.
This can be tested by reading a i2c slave that is not there.
There were still some things wrong with samd5x CPU init which only
showed up when used in conjunction with RIOTBOOT, that is cpu_init()
was called twice.
- gclk_connect() should block until the GCLK is ready.
- DPLL should be disabled dring configuration.
- make sure not to use DPLL for MCLK when re-configuring DPLL
- All APBxMASK bits should be in a defined state.
- always enable 1kHz oscilator output.
- Before, HSI was enabled as the default case when it is only
used for stm32f0 and stm32f1. It is now implemented explicitly
for those platforms, and only those.
- Since the Vector table must be naturally aligned to the next power
of two of the amount of supported ISR, and the table will be
placed after riotboot_hdr, we must ensure RIOTBOOT_HRD_LEN has the
same alignment.
This adds supoprt for the Atmel SAMD51 & SAME54 SoC.
The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals
with the samd2x Cortex-M0+ and saml1x Cortex-M23 parts.
Atmel Software Framework (ASF) provides a set of low-level header files
that give access to different hardware peripherals of Atmel's ICs.
Origin: Atmel SAMD51 Series Device Support (1.1.96)
License: Apache-2.0
URL: http://packs.download.atmel.com/Atmel.SAMD51_DFP.1.1.96.atpack
Atmel Software Framework (ASF) provides a set of low-level header
files that give access to different hardware peripherals of Atmel's
ICs.
Origin: Atmel SAME54 Series Device Support (1.0.87)
License: Apache-2.0
URL: http://packs.download.atmel.com/Atmel.SAME54_DFP.1.0.87.atpack
This cleans up the sam0 timer driver:
- remove the check for the unused freq parameter
- the MCU provides dedicated SET/CLR registers to avoid
read-modify-write, so don't do read-modify-write on them.
- workaround a possible hardware bug on SAMD5x:
loop until the CMD_READSYNC is really set
This change required correcting the values for LCRH_PEN and LRCH_EPS
values defined in cc26x0_uart.h, as they were incorrect according to
19.8.1.7 of the TI CC26x0 reference manual.
on-behalf-of: @sparkmeter <ben.postman@sparkmeter.io>
