/* * Copyright (C) 2018 OTA keys S.A. * * This file is subject to the terms and conditions of the GNU Lesser * General Public License v2.1. See the file LICENSE in the top level * directory for more details. */ /** * @ingroup boards_ublox-c030-u201 * @{ * * @file * @brief Peripheral MCU configuration for the Ublox C030-U201 board * * @author Vincent Dupont */ #ifndef PERIPH_CONF_H #define PERIPH_CONF_H #include "periph_cpu.h" #ifdef __cplusplus extern "C" { #endif /** * @name Clock settings * * @note This is auto-generated from * `cpu/stm32_common/dist/clk_conf/clk_conf.c` * @{ */ /* give the target core clock (HCLK) frequency [in Hz], * maximum: 180MHz */ #define CLOCK_CORECLOCK (168000000U) /* 0: no external high speed crystal available * else: actual crystal frequency [in Hz] */ #define CLOCK_HSE (12000000U) /* 0: no external low speed crystal available, * 1: external crystal available (always 32.768kHz) */ #define CLOCK_LSE (1U) /* peripheral clock setup */ #define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1 #define CLOCK_AHB (CLOCK_CORECLOCK / 1) #define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV4 /* max 45MHz */ #define CLOCK_APB1 (CLOCK_CORECLOCK / 4) #define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV2 /* max 90MHz */ #define CLOCK_APB2 (CLOCK_CORECLOCK / 2) /* Main PLL factors */ #define CLOCK_PLL_M (6) #define CLOCK_PLL_N (168) #define CLOCK_PLL_P (2) #define CLOCK_PLL_Q (7) /** @} */ /** * @name Timer configuration * @{ */ static const timer_conf_t timer_config[] = { { .dev = TIM5, .max = 0xffffffff, .rcc_mask = RCC_APB1ENR_TIM5EN, .bus = APB1, .irqn = TIM5_IRQn } }; #define TIMER_0_ISR isr_tim5 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0])) /** @} */ /** * @name UART configuration * @{ */ static const uart_conf_t uart_config[] = { { .dev = USART1, .rcc_mask = RCC_APB2ENR_USART1EN, .rx_pin = GPIO_PIN(PORT_A, 10), .tx_pin = GPIO_PIN(PORT_A, 9), .rx_af = GPIO_AF7, .tx_af = GPIO_AF7, .bus = APB2, .irqn = USART1_IRQn, #ifdef MODULE_STM32_PERIPH_UART_HW_FC .cts_pin = GPIO_UNDEF, .rts_pin = GPIO_UNDEF, .cts_af = GPIO_AF7, .rts_af = GPIO_AF7, #endif }, { /* Modem UART */ .dev = USART2, .rcc_mask = RCC_APB1ENR_USART2EN, .rx_pin = GPIO_PIN(PORT_D, 6), .tx_pin = GPIO_PIN(PORT_D, 5), .rx_af = GPIO_AF7, .tx_af = GPIO_AF7, .bus = APB1, .irqn = USART2_IRQn, #ifdef MODULE_STM32_PERIPH_UART_HW_FC .cts_pin = GPIO_PIN(PORT_D, 3), .rts_pin = GPIO_PIN(PORT_D, 4), .cts_af = GPIO_AF7, .rts_af = GPIO_AF7, #endif }, { /* GPS UART */ .dev = USART6, .rcc_mask = RCC_APB2ENR_USART6EN, .rx_pin = GPIO_PIN(PORT_C, 7), .tx_pin = GPIO_PIN(PORT_C, 6), .rx_af = GPIO_AF8, .tx_af = GPIO_AF8, .bus = APB2, .irqn = USART6_IRQn, #ifdef MODULE_STM32_PERIPH_UART_HW_FC .cts_pin = GPIO_UNDEF, .rts_pin = GPIO_UNDEF, .cts_af = GPIO_AF8, .rts_af = GPIO_AF8, #endif }, { /* Arduino Port UART */ .dev = USART3, .rcc_mask = RCC_APB1ENR_USART3EN, .rx_pin = GPIO_PIN(PORT_D, 9), .tx_pin = GPIO_PIN(PORT_D, 8), .rx_af = GPIO_AF7, .tx_af = GPIO_AF7, .bus = APB1, .irqn = USART3_IRQn, #ifdef MODULE_STM32_PERIPH_UART_HW_FC .cts_pin = GPIO_UNDEF, .rts_pin = GPIO_UNDEF, .cts_af = GPIO_AF7, .rts_af = GPIO_AF7, #endif }, }; #define UART_0_ISR (isr_usart1) #define UART_1_ISR (isr_usart2) #define UART_2_ISR (isr_usart6) #define UART_3_ISR (isr_usart3) #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0])) /** @} */ /** * @name SPI configuration * * @note The spi_divtable is auto-generated from * `cpu/stm32_common/dist/spi_divtable/spi_divtable.c` * @{ */ static const uint8_t spi_divtable[2][5] = { { /* for APB1 @ 42000000Hz */ 7, /* -> 164062Hz */ 6, /* -> 328125Hz */ 4, /* -> 1312500Hz */ 2, /* -> 5250000Hz */ 1 /* -> 10500000Hz */ }, { /* for APB2 @ 84000000Hz */ 7, /* -> 328125Hz */ 7, /* -> 328125Hz */ 5, /* -> 1312500Hz */ 3, /* -> 5250000Hz */ 2 /* -> 10500000Hz */ } }; static const spi_conf_t spi_config[] = { { .dev = SPI4, .mosi_pin = GPIO_PIN(PORT_E, 6), .miso_pin = GPIO_PIN(PORT_E, 5), .sclk_pin = GPIO_PIN(PORT_E, 2), .cs_pin = GPIO_PIN(PORT_E, 11), .af = GPIO_AF5, .rccmask = RCC_APB2ENR_SPI4EN, .apbbus = APB2 }, }; #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0])) /** @} */ /** * @name I2C configuration * @{ */ #define I2C_0_EN 1 #define I2C_1_EN 1 #define I2C_NUMOF 2 #define I2C_IRQ_PRIO 1 #define I2C_APBCLK (CLOCK_APB1) /* I2C 0 device configuration */ #define I2C_0_DEV I2C1 #define I2C_0_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_I2C1EN)) #define I2C_0_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_I2C1EN)) #define I2C_0_EVT_IRQ I2C1_EV_IRQn #define I2C_0_EVT_ISR isr_i2c1_ev #define I2C_0_ERR_IRQ I2C1_ER_IRQn #define I2C_0_ERR_ISR isr_i2c1_er /* I2C 0 pin configuration */ #define I2C_0_SCL_PORT GPIOB #define I2C_0_SCL_PIN 6 #define I2C_0_SCL_AF 4 #define I2C_0_SCL_CLKEN() (periph_clk_en(AHB1, RCC_AHB1ENR_GPIOBEN)) #define I2C_0_SDA_PORT GPIOB #define I2C_0_SDA_PIN 7 #define I2C_0_SDA_AF 4 #define I2C_0_SDA_CLKEN() (periph_clk_en(AHB1, RCC_AHB1ENR_GPIOBEN)) /* I2C 1 device configuration */ #define I2C_1_DEV I2C3 #define I2C_1_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_I2C3EN)) #define I2C_1_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_I2C3EN)) #define I2C_1_EVT_IRQ I2C3_EV_IRQn #define I2C_1_EVT_ISR isr_i2c3_ev #define I2C_1_ERR_IRQ I2C3_ER_IRQn #define I2C_1_ERR_ISR isr_i2c3_er /* I2C 1 pin configuration */ #define I2C_1_SCL_PORT GPIOA #define I2C_1_SCL_PIN 8 #define I2C_1_SCL_AF 4 #define I2C_1_SCL_CLKEN() (periph_clk_en(AHB1, RCC_AHB1ENR_GPIOAEN)) #define I2C_1_SDA_PORT GPIOC #define I2C_1_SDA_PIN 9 #define I2C_1_SDA_AF 4 #define I2C_1_SDA_CLKEN() (periph_clk_en(AHB1, RCC_AHB1ENR_GPIOCEN)) /** @} */ /** * @name ADC configuration * * Note that we do not configure all ADC channels, * and not in the STM32F437 order. Instead, we * just define 6 ADC channels, for the * Arduino header pins A0-A5 * * @{ */ #define ADC_NUMOF (6U) #define ADC_CONFIG { \ {GPIO_PIN(PORT_A, 3), 0, 3}, \ {GPIO_PIN(PORT_C, 0), 0, 10}, \ {GPIO_PIN(PORT_C, 3), 0, 4}, \ {GPIO_PIN(PORT_A, 4), 0, 14}, \ {GPIO_PIN(PORT_B, 7), 0, 7}, \ {GPIO_PIN(PORT_B, 6), 0, 6}, \ } /** @} */ /** * @name RTC configuration * @{ */ #define RTC_NUMOF (1U) /** @} */ #ifdef __cplusplus } #endif #endif /* PERIPH_CONF_H */ /** @} */