164 lines
3.8 KiB
C
164 lines
3.8 KiB
C
/*
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* Copyright (C) 2015 Rakendra Thapa <rakendrathapa@gmail.com
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_lm4f120
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* @{
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*
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* @file
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* @brief Implementation of the low-level timer driver for the LM4F120
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*
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* @author Rakendra Thapa <rakendrathapa@gmail.com>
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* @}
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*/
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#include <stdint.h>
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#include "cpu.h"
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#include "sched.h"
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#include "thread.h"
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#include "periph_conf.h"
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#include "periph/timer.h"
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/* guard file in case no timers are defined */
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#if TIMER_0_EN
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/**
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* @brief Struct holding the configuration data
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*/
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typedef struct {
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void (*cb)(int); /**< timeout callback */
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} timer_conf_t;
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static timer_conf_t config[TIMER_NUMOF];
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int timer_init(tim_t dev, unsigned int us_per_tick, void (*callback)(int))
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{
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if (dev == TIMER_0) {
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config[dev].cb = callback; // User Function
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ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_WTIMER0); //Activate Timer0
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WTIMER0_CTL_R &= ~0x00000001; // Disable timer0A during setup
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WTIMER0_CFG_R = TIMER_CFG_16_BIT;
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WTIMER0_TAMR_R = TIMER_TAMR_TAMR_PERIOD; // | TIMER_TAMR_TACDIR); // Configure for periodic mode
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WTIMER0_TAPR_R = 39; // 1us timer0A
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WTIMER0_ICR_R = 0x00000001; // clear timer0A timeout flag
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WTIMER0_IMR_R |= 0x00000001; // arm timeout interrupt
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// NVIC_SetPriority(TIMER_0_IRQ_CHAN, TIMER_IRQ_PRIO);
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ROM_IntPrioritySet(INT_WTIMER0A, 32);
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ROM_IntEnable(INT_WTIMER0A);
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ROM_TimerIntEnable(WTIMER0_BASE, TIMER_TIMA_TIMEOUT);
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// timer_irq_enable(dev);
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timer_start(dev);
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DEBUG("startTimeout Value=%lu\n", ROM_TimerValueGet(WTIMER0_BASE, TIMER_A));
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return 1;
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}
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return -1;
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}
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int timer_set(tim_t dev, int channel, unsigned int timeout)
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{
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if (dev == TIMER_0) {
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unsigned int now = timer_read(dev);
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DEBUG("timer_set now=%u\n",now);
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DEBUG("timer_set timeout=%u\n", timeout);
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return timer_set_absolute(dev, channel, HWTIMER_MAXTICKS-1-now+timeout);
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}
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return -1;
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}
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int timer_set_absolute(tim_t dev, int channel, unsigned int value)
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{
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if (dev == TIMER_0) {
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WTIMER0_TAILR_R = 0x00000000 | value; // period; Reload value
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DEBUG("Setting timer absolute value=%u\n", value);
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return 1;
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}
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return -1;
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}
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int timer_clear(tim_t dev, int channel)
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{
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if (dev == TIMER_0){
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WTIMER0_TAILR_R = 0x00000000; // period; Reload value
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return 1;
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}
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return -1;
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}
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unsigned int timer_read(tim_t dev)
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{
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if (dev == TIMER_0) {
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unsigned int currTimer0Val=0;
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currTimer0Val = (unsigned int)ROM_TimerValueGet(WTIMER0_BASE, TIMER_A);
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return (HWTIMER_MAXTICKS - currTimer0Val);
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}
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return 0;
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}
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void timer_start(tim_t dev)
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{
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if (dev == TIMER_0) {
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DEBUG("Starting the timer\n");
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ROM_TimerEnable(WTIMER0_BASE, TIMER_A);
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}
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}
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void timer_stop(tim_t dev)
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{
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if (dev == TIMER_0) {
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ROM_TimerDisable(WTIMER0_BASE, TIMER_A);
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}
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}
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void timer_irq_enable(tim_t dev)
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{
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if (dev == TIMER_0) {
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DEBUG("Enabling Timer Interrupts\n");
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ROM_IntEnable(INT_WTIMER0A);
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ROM_TimerIntEnable(WTIMER0_BASE, TIMER_TIMA_TIMEOUT);
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}
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}
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void timer_irq_disable(tim_t dev)
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{
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if (dev == TIMER_0) {
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DEBUG("Disabling Timer Interrupts\n");
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ROM_IntDisable(INT_WTIMER0A);
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}
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}
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void timer_reset(tim_t dev)
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{
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if (dev == TIMER_0) {
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// Performs a software reset of a peripheral
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ROM_SysCtlPeripheralReset(SYSCTL_PERIPH_WTIMER0);
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}
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}
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#if TIMER_0_EN
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void TIMER0IntHandler(void)
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{
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TIMER0_ICR_R = TIMER_ICR_TATOCINT; // acknowledge timer0A timeout
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config[TIMER_0].cb(0);
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if (sched_context_switch_request){
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thread_yield();
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}
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}
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void WTIMER0IntHandler(void)
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{
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WTIMER0_ICR_R = TIMER_ICR_TATOCINT; // acknowledge timer0A timeout
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config[TIMER_0].cb(0);
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if (sched_context_switch_request){
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thread_yield();
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}
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}
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#endif
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#endif /* TIMER_0_EN */
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