32bbba2fc5
lpc23xx has 2k of battery RAM that is retained in Deep Power Down mode. To not overwrite that data it must only be initialized on Power On Reset. However, RSIR looks the same when waking up from Deep Power Down as it does on the power-on case. So use 4 bytes of the backup RAM to keep a signature that is only valid if memory was retained (no power-on Reset). A small change to the linker script is required so two sections can be placed into flash.
112 lines
2.4 KiB
C
112 lines
2.4 KiB
C
/*
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* Copyright 2008-2009, Freie Universitaet Berlin (FUB). All rights reserved.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_arm7_common
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* @{
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*
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* @file
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* @brief Common ARM7 boot up code
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*
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* @author Heiko Will <hwill@inf.fu-berlin.de>
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* @author Michael Baar <michael.baar@fu-berlin.de>
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include "thread.h"
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#ifdef MODULE_PUF_SRAM
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#include "puf_sram.h"
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#endif
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#include "cpu.h"
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#include "log.h"
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static inline void
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_init_data(void)
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{
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extern unsigned int _etext;
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extern unsigned int _data;
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extern unsigned int _edata;
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extern unsigned int __bss_start;
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extern unsigned int __bss_end;
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/* Support for LPRAM. */
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#ifdef CPU_HAS_BACKUP_RAM
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extern unsigned int _sbackup_data_load[];
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extern unsigned int _sbackup_data[];
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extern unsigned int _ebackup_data[];
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extern unsigned int _sbackup_bss[];
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extern unsigned int _ebackup_bss[];
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#endif /* CPU_HAS_BACKUP_RAM */
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register unsigned int *p1;
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register unsigned int *p2;
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register unsigned int *p3;
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// initialize data from flash
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// (linker script ensures that data is 32-bit aligned)
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p1 = &_etext;
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p2 = &_data;
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p3 = &_edata;
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while (p2 < p3) {
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*p2++ = *p1++;
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}
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// clear bss
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// (linker script ensures that bss is 32-bit aligned)
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p1 = &__bss_start;
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p2 = &__bss_end;
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while (p1 < p2) {
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*p1++ = 0;
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}
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#ifdef CPU_HAS_BACKUP_RAM
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if (cpu_woke_from_backup()) {
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/* load low-power data section. */
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for (p1 = _sbackup_data, p2 = _sbackup_data_load;
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p1 < _ebackup_data;
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p1++, p2++) {
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*p1 = *p2;
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}
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/* zero-out low-power bss. */
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for (p1 = _sbackup_bss; p1 < _ebackup_bss; p1++) {
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*p1 = 0;
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}
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}
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#endif /* CPU_HAS_BACKUP_RAM */
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}
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void bootloader(void)
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{
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extern void cpu_init(void);
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/* initialize bss and data */
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_init_data();
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#ifdef MODULE_PUF_SRAM
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/* uninitialized heap starts after bss section */
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extern unsigned int __bss_end;
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puf_sram_init((uint8_t *) __bss_end, SEED_RAM_LEN);
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#endif
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/* cpu specific setup of clocks, peripherals */
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cpu_init();
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#ifdef MODULE_NEWLIB
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extern void __libc_init_array(void);
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__libc_init_array();
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#endif
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}
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/** @} */
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