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RIOT/cpu/stm32
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Alexandre Abadie 337b99002a
cpu/stm32/stmclk: enable 48MHz when usbdev is used
2021-12-01 10:15:19 +01:00
..
bootloader
cpu/stm32: implement reset to bootloader
2020-06-05 18:41:06 +02:00
dist
cpu/stm32/dist: fix bug in gen_kconfig.py script
2021-11-29 13:52:26 +01:00
include
cpu/stm32: clone cmsis header in build/stm32
2021-11-19 13:24:57 +01:00
kconfigs
cpu/stm32/kfconfigs: add new CPU from L4 family
2021-11-29 14:26:00 +01:00
ldscripts
cpu/stm32: introduce unique directory for stm32 cpus
2020-05-20 13:39:10 +02:00
periph
cpu/stm32/usbdev: poweron USB during initialization
2021-12-01 10:15:19 +01:00
stmclk
cpu/stm32/stmclk: enable 48MHz when usbdev is used
2021-12-01 10:15:19 +01:00
vectors
cpu/stm32: Add Kconfig dependency modeling
2021-07-02 15:11:05 +02:00
cpu_common.c
cpu/stm32: added APB12 bus multiplier entry for applicable cpus
2021-09-23 08:46:52 -04:00
cpu_init.c
cpu/stm32: Add hardening changes to stm32
2021-11-11 15:58:52 -06:00
doc.txt
cpu/stm32: rework clock configuration documentation
2020-10-27 08:54:09 +01:00
Kconfig
cpu/stm32: Add hardening changes to stm32
2021-11-11 15:58:52 -06:00
Makefile
cpu/stm32: only build bootloader when the module is loaded
2020-09-28 21:07:01 +02:00
Makefile.cmsis
cpu/stm32: bump cmsis versions to latest release
2021-11-29 13:22:59 +01:00
Makefile.default
cpu: make pm_layered a DEFAULT_MODULE
2021-01-27 13:21:20 +01:00
Makefile.dep
cpu/stm32/wl: initial periph_adc implementation
2021-11-15 09:52:45 +01:00
Makefile.features
cpu/stm32: add rtc_mem
2021-09-07 10:06:31 +02:00
Makefile.include
cpu/stm32: clone cmsis header in build/stm32
2021-11-19 13:24:57 +01:00
stm32_info.mk
cpu/stm32: handle parsing stm32wlex CPU_MODELs
2021-07-21 11:23:47 +02:00
stm32_line.mk
cpu/stm32: set CPU_LINE for stm32mp157c
2020-11-13 10:43:08 +01:00
stm32_mem_lengths.mk
cpu/stm32: added RAM_LEN identifier for stm32g03x
2021-09-23 10:06:33 -04:00
stm32_riotboot.mk
cpu/stm32: introduce CPU_FAM_SHORT variable
2020-05-26 12:27:12 +02:00
stm32.config
cpu/stm32: Add Kconfig dependency modeling
2021-07-02 15:11:05 +02:00