9fa0099d62
- Since flash access is shared with CPU2 we resize ROM_LEN according to CPU2 secure flash memmory area. - Add assert to prevent unauthorized reads from CPU2 secure flash area
6 lines
166 B
Makefile
6 lines
166 B
Makefile
FEATURES_PROVIDED += periph_flashpage
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FEATURES_PROVIDED += periph_flashpage_raw
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FEATURES_PROVIDED += periph_hwrng
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-include $(RIOTCPU)/stm32_common/Makefile.features
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