Alexandre Abadie c68f63b318

cpu/stm32f1f3: handle custom pll prediv/mul at cpu level

2020-12-08 17:36:52 +01:00

..

f0

cpu/stm32f0: handle custom pll prediv/mul at cpu level

2020-11-10 15:55:38 +01:00

f1f3

cpu/stm32f1f3: handle custom pll prediv/mul at cpu level

2020-12-08 17:36:52 +01:00

f2f4f7

cpu/stm32/clk/f2f4f7: add config for 25 MHz HSE

2020-11-05 15:46:11 +01:00

g0

cpu/stm32: remove useless include in clock configuration

2020-10-26 11:21:07 +01:00

g4

cpu/stm32: remove useless include in clock configuration

2020-10-26 11:21:07 +01:00

l0l1

cpu/stm32: move clock configuration headers to cpu

2020-10-26 11:16:23 +01:00

l4l5wb

cpu/stm32: move stm32l5 default PLL N to cpu

2020-11-10 09:34:07 +01:00

mp1

cpu/stm32: configure timer2 for stm32mp1 boards

2020-11-13 10:43:08 +01:00

clk_conf.h

cpu/stm32: configure timer2 for stm32mp1 boards

2020-11-13 10:43:08 +01:00