7d1d5e77d8
New CPU FE310 from SiFive based on RISC-V architecture build: add makefile for RISC-V builds Makefile for builds using RISC-V tools
8 lines
167 B
Makefile
8 lines
167 B
Makefile
# define the module that is built
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MODULE = cpu
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# add a list of subdirectories, that should also be built
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DIRS = periph nano vendor
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include $(RIOTBASE)/Makefile.base
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