154 lines
4.0 KiB
C
154 lines
4.0 KiB
C
/*
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* Copyright (C) 2015-2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_lpc11u34
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* @{
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*
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* @file
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* @brief CPU specific definitions for internal peripheral handling
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*
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* @author Paul RATHGEB <paul.rathgeb@skynet.be>
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* @author Hauke Petersen<hauke.petersen@fu-berlin.de>
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*/
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#include <stdint.h>
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#include "cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief declare needed generic SPI functions
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* @{
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*/
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#define PERIPH_SPI_NEEDS_INIT_CS
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#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
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#define PERIPH_SPI_NEEDS_TRANSFER_REG
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#define PERIPH_SPI_NEEDS_TRANSFER_REGS
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/** @} */
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/**
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* @brief Length of the CPU_ID in octets
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*/
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#define CPUID_LEN (16U)
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/**
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* @brief Define number of available ADC lines
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*/
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#define ADC_NUMOF (8U)
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/**
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* @brief Override the default GPIO type
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* @{
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*/
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#define HAVE_GPIO_T
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typedef uint16_t gpio_t;
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/** @} */
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/**
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* @brief Define a custom GPIO_PIN macro for the lpc11u34
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*/
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#define GPIO_PIN(port, pin) (gpio_t)((port << 8) | pin)
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/**
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* @brief Number of PWM channels per PWM peripheral
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*/
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#define PWM_CHAN_NUMOF (3U)
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/**
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* @brief Generate GPIO mode bitfields
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*
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* We use the following bits to encode the pin mode:
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* - bit 0: 0 for input or 1 for output
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* - bit 3: Pull-down resistor enable
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* - bit 4: Pull-up resistor enable
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* - bit 10: Open drain enable
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*/
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#define GPIO_MODE_BITS(pu, pd, od, out) ((pu << 4) | (pd << 3) | (od << 10) | out)
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#ifndef DOXYGEN
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/**
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* @brief Override GPIO modes
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* @{
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*/
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#define HAVE_GPIO_MODE_T
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typedef enum {
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GPIO_IN = GPIO_MODE_BITS(0, 0, 0, 0), /**< in without pull resistor */
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GPIO_IN_PD = GPIO_MODE_BITS(0, 1, 0, 0), /**< in with pull-down */
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GPIO_IN_PU = GPIO_MODE_BITS(1, 0, 0, 0), /**< in with pull-up */
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GPIO_OUT = GPIO_MODE_BITS(0, 0, 0, 1), /**< push-pull output */
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GPIO_OD = GPIO_MODE_BITS(0, 0, 1, 1), /**< open-drain output */
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GPIO_OD_PU = GPIO_MODE_BITS(1, 0, 1, 1), /**< open-drain output with pull-up */
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} gpio_mode_t;
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/** @} */
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/**
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* @brief Override the ADC resolution settings
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* @{
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*/
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#define HAVE_ADC_RES_T
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typedef enum {
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ADC_RES_6BIT = (0x4 << 17), /**< ADC resolution: 6 bit */
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ADC_RES_8BIT = (0x2 << 17), /**< ADC resolution: 8 bit */
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ADC_RES_10BIT = (0x0 << 17), /**< ADC resolution: 10 bit */
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ADC_RES_12BIT = 1, /**< ADC resolution: 12 bit, no supported */
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ADC_RES_14BIT = 2, /**< ADC resolution: 14 bit, no supported */
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ADC_RES_16BIT = 3, /**< ADC resolution: 16 bit, no supported */
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} adc_res_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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/**
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* @brief PWM configuration
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*/
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typedef struct {
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LPC_CTxxBx_Type *dev; /**< PWM device */
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__IO uint32_t *pins[PWM_CHAN_NUMOF]; /**< set to NULL if channel is not used */
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uint16_t clk_bit; /**< clock enable bit */
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uint8_t af; /**< alternate pin function */
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} pwm_conf_t;
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/**
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* @brief Override SPI clock speed values
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*
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* @note The values expect the CPU to run at 12MHz
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* @todo Generalize the SPI driver
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*
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* @{
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*/
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#define HAVE_SPI_CLK_T
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typedef enum {
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SPI_CLK_100KHZ = 119, /**< drive the SPI bus with 100KHz */
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SPI_CLK_400KHZ = 29, /**< drive the SPI bus with 400KHz */
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SPI_CLK_1MHZ = 11, /**< drive the SPI bus with 1MHz */
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SPI_CLK_5MHZ = 2, /**< drive the SPI bus with 5MHz */
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SPI_CLK_10MHZ = 0 /**< actual: 12 MHz */
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} spi_clk_t;
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/** @} */
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/**
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* @brief SPI configuration data
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*/
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typedef struct {
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LPC_SSPx_Type *dev; /**< SPI device to configure */
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uint32_t preset_bit; /**< mask of the corresponding preset bit */
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uint32_t ahb_bit; /**< mask of the corresponding AHB bit */
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} spi_conf_t;
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H */
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/** @} */
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