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RIOT/cpu/esp32/ld
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Gunar Schorcht 5b4389cf46 cpu/esp32: update of ld script for littlefs* 
During the write access to the SPI flash, the IROM cache is not available and only code from the IRAM can be executed. Therefore, the code of file system implementations which access the SPI flash must reside in IRAM.
2020-02-22 01:35:07 +01:00
..
esp32.common.ld
cpu/esp32: update of ld script for littlefs*
2020-02-22 01:35:07 +01:00
esp32.ld
cpu: add esp32
2018-10-08 12:20:49 +02:00
esp32.peripherals.ld
cpu: add esp32
2018-10-08 12:20:49 +02:00
esp32.rom.ld
cpu: add esp32
2018-10-08 12:20:49 +02:00
esp32.rom.nanofmt.ld
cpu: add esp32
2018-10-08 12:20:49 +02:00
esp32.rom.nosdk.ld
cpu: add esp32
2018-10-08 12:20:49 +02:00
esp32.spiram.rom-functions-dram.ld
cpu: add esp32
2018-10-08 12:20:49 +02:00
esp32.spiram.rom-functions-iram.ld
cpu: add esp32
2018-10-08 12:20:49 +02:00
README.md
cpu: add esp32
2018-10-08 12:20:49 +02:00

README.md

The files in this directory are originally from the ESP-IDF and modified for RIOT-OS. All these files are under the copyright of their respective ownwers and licensed under the Apache License, Version 2.0, see.