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new implementation of UART functions, respecting RIOT more now

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This commit is contained in:
Thomas Eichinger 2013-05-08 11:40:17 +02:00
parent d70982d5ba
commit 15ec5c2f17
3 changed files with 44 additions and 218 deletions
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4
redbee-econotag/drivers/redbee_uart.c
View File

@ -162,6 +162,10 @@ void uart_init ( volatile struct UART_struct* uart, uint32_t baudrate ) {
int fw_puts(char *astring,int length)
{
return uart0_puts ( astring, length );
}
static inline uint32_t uart0_puts ( uint8_t *astring, uint32_t length ) {
int i = 0;
for (; i<length; i++) {
uart1_putc( astring[i] );

145
redbee-econotag/drivers/redbee_uart1.c
View File

@ -1,5 +1,5 @@
/*
* redbee_uart1.c - UART1 driver for redbee
* uart1.c - UART1 driver for redbee
* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
* 2013 Thomas Eichinger <thomas.eichinger@fu-berlin.de>
*
@ -10,145 +10,40 @@
*/
#include "mc1322x.h"
#include "board_uart0.h"
#include "uart.h"
volatile uint8_t u1_tx_buf[UART1_TX_BUFFERSIZE];
volatile uint32_t u1_tx_head, u1_tx_tail;
#if UART1_RX_BUFFERSIZE > 32
volatile uint8_t u1_rx_buf[UART1_RX_BUFFERSIZE];
volatile uint32_t u1_rx_head, u1_rx_tail;
#endif
void uart1_isr ( void ) {
#if UART1_RX_BUFFERSIZE > 32
/* receive interrupt */
if ( UART1->USTATbits.RXRDY == 1) {
/* copy fifo into SW buffer */
while (UART1->RXCON != 0) {
uint32_t u1_rx_tail_next;
u1_rx_tail_next = u1_rx_tail + 1;
if ( u1_rx_tail_next >= sizeof(u1_rx_buf) ) {
u1_rx_tail_next = 0;
}
if ( u1_rx_head != u1_rx_tail_next ) {
u1_rx_buf[u1_rx_tail] = UART1->DATA;
u1_rx_tail = u1_rx_tail_next;
}
/* buffer full, flush fifo */
else {
while ( UART1->RXCON != 0 ) {
UART1->DATA;
int i = 0;
if ( UART1->USTATbits.RXRDY == 1 ) {
#ifdef MODULE_UART0
if ( uart0_handler_pid ) {
while ( UART1->RXCON != 0 ) {
uart0_handle_incoming( UART1->DATA );
if ( ++i >= UART0_BUFSIZE ) {
uart0_notify_thread();
i = 0;
}
}
uart0_notify_thread();
}
return;
}
#endif
while ( UART1->TXCON != 0 ) {
if ( u1_tx_head == u1_tx_tail ) {
#if UART1_RX_BUFFERSIZE > 32
UART1->CONbits.MTXR = 1;
#else
disable_irq(UART1);
#endif
return;
}
UART1->DATA = u1_tx_buf[u1_tx_tail++];
if ( u1_tx_tail >= sizeof(u1_tx_buf) ) {
u1_tx_tail = 0;
}
}
}
void uart1_putc ( uint8_t c ) {
/* disable UART1_IRQ since it modifies u1_tx_(head|tail) */
#if UART1_RX_BUFFERSIZE > 32
UART1->CONbits.MTXR = 1;
#else
disable_irq(UART1);
#endif
if ( (u1_tx_head == u1_tx_tail) && (UART1->TXCON != 0) ) {
UART1->DATA = c;
/* while uart fifo is full */
while ( UART1->TXCON == 0 ) {
/* wait */
}
else {
u1_tx_buf[u1_tx_head++] = c;
if ( u1_tx_head >= sizeof(u1_tx_buf) ) {
u1_tx_head = 0;
}
if ( u1_tx_head == u1_tx_tail ) {
uint32_t u1_tx_tail_save = u1_tx_tail;
/* back up head to show buffer not empty and enable tx interrupt */
u1_tx_head--;
#if UART1_RX_BUFFERSIZE > 32
UART1->CONbits.MTXR = 0;
#else
enable_irq(UART1);
#endif
/* tail will change after one char goes out */
while ( u1_tx_tail_save == u1_tx_tail ) {
/* wait */
}
/* restor head */
u1_tx_head++;
return;
}
}
#if UART1_RX_BUFFERSIZE > 32
UART1->CONbits.MTXR = 0;
#else
enable_irq(UART1);
#endif
UART1->DATA = c;
}
uint8_t uart1_getc ( void ) {
#if UART1_RX_BUFFERSIZE > 32
/* pull from ram buffer */
uint8_t c = 0;
if ( u1_rx_head != u1_rx_tail ) {
c = u1_rx_buf[u1_rx_head++];
if ( u1_rx_head >= sizeof(u1_rx_buf) ) {
u1_rx_head = 0;
}
return c;
}
#endif
/* pull from hw fifo */
while ( uart1_can_get() == 0 ) {
/* while uart fifo is empty */
while ( UART1->RXCON == 0 ) {
/* wait */
}
return UART1->DATA;
}
// static volatile unsigned int running = 0;
// static volatile unsigned int fifo = 0;
//
// static inline int uart0_puts(char *astring, int length)
// {
// int i;
// for (i=0;i<length;i++) {
// /* TODO: Fix me */
// while(UART1->TXCON != 0);
// UART1->DATA = astring[i];
// }
// return length;
// }
//
// int fw_puts(char *astring, int length)
// {
// return uart0_puts(astring, length);
// }
//
// void stdio_flush(void)
// {
// /* disable TX interrupt */
// UART1->CONbits.MTXR = 1;
// while(running) {
// while(UART1->TXCON != 0);
// fifo=0;
// push_queue(); // dequeue to fifo
// }
// /* enable TX interrupt */
// UART1->CONbits.MTXR = 0;
// }
}

113
redbee-econotag/drivers/redbee_uart2.c
View File

@ -1,6 +1,7 @@
/*
* redbee_uart2.c - UART2 driver for redbee
* Copyright (C) 2013 Thomas Eichinger <thomas.eichinger@fu-berlin.de>
* uart1.c - UART1 driver for redbee
* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
* 2013 Thomas Eichinger <thomas.eichinger@fu-berlin.de>
*
* This source code is licensed under the GNU General Public License,
* Version 3. See the file LICENSE for more details.
@ -9,112 +10,38 @@
*/
#include "mc1322x.h"
#include "board_uart0.h"
#include "uart.h"
volatile uint8_t u2_tx_buf[UART2_TX_BUFFERSIZE];
volatile uint32_t u2_tx_head, u2_tx_tail;
#if UART2_RX_BUFFERSIZE > 32
volatile uint8_t u2_rx_buf[UART2_RX_BUFFERSIZE];
volatile uint32_t u2_rx_head, u2_rx_tail;
#endif
void uart2_isr ( void ) {
#if UART2_RX_BUFFERSIZE > 32
/* receive interrupt */
if ( UART2->USTATbits.RXRDY == 1) {
/* copy fifo into SW buffer */
while (UART2->RXCON != 0) {
uint32_t u2_rx_tail_next;
u2_rx_tail_next = u2_rx_tail + 1;
if ( u2_rx_tail_next >= sizeof(u2_rx_buf) ) {
u2_rx_tail_next = 0;
}
if ( u2_rx_head != u2_rx_tail_next ) {
u2_rx_buf[u2_rx_tail] = UART2->DATA;
u2_rx_tail = u2_rx_tail_next;
}
/* buffer full, flush fifo */
else {
while ( UART2->RXCON != 0 ) {
UART2->DATA;
int i = 0;
if ( UART2->USTATbits.RXRDY == 1 ) {
#ifdef MODULE_UART0
if ( uart0_handler_pid ) {
while ( UART2->RXCON != 0 ) {
uart0_handle_incoming( UART2->DATA );
if ( ++i >= UART0_BUFSIZE ) {
uart0_notify_thread();
i = 0;
}
}
uart0_notify_thread();
}
return;
}
#endif
while ( UART2->TXCON != 0 ) {
if ( u2_tx_head == u2_tx_tail ) {
#if UART2_RX_BUFFERSIZE > 32
UART2->CONbits.MTXR = 1;
#else
disable_irq(UART2);
#endif
return;
}
UART2->DATA = u2_tx_buf[u2_tx_tail++];
if ( u2_tx_tail >= sizeof(u2_tx_buf) ) {
u2_tx_tail = 0;
}
}
}
void uart2_putc ( uint8_t c ) {
/* disable UART2_IRQ since it modifies u2_tx_(head|tail) */
#if UART2_RX_BUFFERSIZE > 32
UART2->CONbits.MTXR = 1;
#else
disable_irq(UART2);
#endif
if ( (u2_tx_head == u2_tx_tail) && (UART2->TXCON != 0) ) {
UART2->DATA = c;
/* while uart fifo is full */
while ( UART2->TXCON == 0 ) {
/* wait */
}
else {
u2_tx_buf[u2_tx_head++] = c;
if ( u2_tx_head >= sizeof(u2_tx_buf) ) {
u2_tx_head = 0;
}
if ( u2_tx_head == u2_tx_tail ) {
uint32_t u2_tx_tail_save = u2_tx_tail;
/* back up head to show buffer not empty and enable tx interrupt */
u2_tx_head--;
#if UART2_RX_BUFFERSIZE > 32
UART2->CONbits.MTXR = 0;
#else
enable_irq(UART2);
#endif
/* tail will change after one char goes out */
while ( u2_tx_tail_save == u2_tx_tail ) {
/* wait */
}
/* restor head */
u2_tx_head++;
return;
}
}
#if UART2_RX_BUFFERSIZE > 32
UART2->CONbits.MTXR = 0;
#else
enable_irq(UART2);
#endif
UART2->DATA = c;
}
uint8_t uart2_getc ( void ) {
#if UART2_RX_BUFFERSIZE > 32
/* pull from ram buffer */
uint8_t c = 0;
if ( u2_rx_head != u2_rx_tail ) {
c = u2_rx_buf[u2_rx_head++];
if ( u2_rx_head >= sizeof(u2_rx_buf) ) {
u2_rx_head = 0;
}
return c;
}
#endif
/* pull from hw fifo */
while ( uart2_can_get() == 0 ) {
/* while uart fifo is empty */
while ( UART2->RXCON == 0 ) {
/* wait */
}
return UART2->DATA;