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implemented stdin for TelosB

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This commit is contained in:
Oleg Hahm 2013-08-19 19:19:57 +02:00
parent 1ada39d7fd
commit 21dff81239
3 changed files with 84 additions and 10 deletions
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1
telosb/Makefile
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@ -5,6 +5,7 @@ export ARCH = telosb_base.a
DEP = $(SRC:%.c=$(BINDIR)%.d)
INCLUDES += -I${RIOTBOARD}/${BOARD}/include/
INCLUDES += -I${RIOTBASE}/core/include/
INCLUDES += -I$(RIOTBASE)/cpu/msp430-common/include/ -I$(RIOTBASE)/cpu/msp430x16x/include/
INCLUDES += -I$(RIOTBASE)/drivers/cc2420/include/ -I$(RIOTBASE)/sys/include

4
telosb/board.c
View File

@ -2,8 +2,8 @@
* board.c - Board initiazilation for the TelosB
* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
*
* This file subject to the terms and conditions of the GLGPLv2 License. See the file LICENSE in the
* top level directory for more details.
* This file subject to the terms and conditions of the LGPLv2. See the file
* LICENSE in the top level directory for more details.
*/
#include "cpu.h"

89
telosb/uart.c
View File

@ -1,22 +1,51 @@
/*
* uart.c - Implementation for the TelosB UART
* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
*
* This file subject to the terms and conditions of the GLGPLv2 License. See the file LICENSE in the
* top level directory for more details.
*/
/*
* uart.c - Implementation for the TelosB UART
* Copyright (C) 2013 Oliver Hahm <oliver.hahm@inria.fr>
*
* This file subject to the terms and conditions of the LGPLv2. See the file
* LICENSE in the top level directory for more details.
*/
#include <stdio.h>
#include <stdint.h>
#include "cpu.h"
#include "board.h"
#include "kernel.h"
#include "board_uart0.h"
#define UART1_TX U1TXBUF
#define UART1_WAIT_TXDONE() while ( (U1TCTL & TXEPT) == 0 ) { _NOP(); }
#define BAUDRATE (115200ul)
static uint8_t calc_umctl(uint16_t br)
{
/* from TI slaa049 */
register uint8_t CMOD = 256 * br - 256 * (br + 1) / 2;
register uint8_t c = 0;
register int i = 0;
register uint8_t a = CMOD;
a <<= 1;
do {
if (a & 0x80) { /* Overflow to integer? */
a = a - 128 + CMOD; /* Yes, subtract 1.000000 */
c |= 0x80;
}
else {
a += CMOD; /* No, add fraction */
}
if (i == 7) {
return c;
}
i++;
c >>= 1;
}
while (1);
}
void uart_init(void)
{
UCTL1 = SWRST; /* hold UART1 module in reset */
@ -26,10 +55,13 @@ void uart_init(void)
UTCTL1 |= SSEL1; /* UCLK = SCLK */
UBR01 = F_CPU / BAUDRATE;
UBR11 = (F_CPU / BAUDRATE) >> 8;
UMCTL1 = 0x4A; /* modulation */
UMCTL1 = calc_umctl(F_CPU / BAUDRATE); /* set modulation */
ME2 |= UTXE1 + URXE1; /* enable UART1 TX/RX */
UCTL1 &= ~SWRST; /* clear UART1 reset bit */
IE2 |= URXIE1; /* enable rx interrupt */
IFG1 &= ~UTXIFG1;
}
int putchar(int c)
@ -43,3 +75,44 @@ uint8_t uart_readByte(void)
{
return U1RXBUF;
}
void usart1irq(void);
/**
* \brief the interrupt function
*/
interrupt(USART1RX_VECTOR) usart1irq(void)
{
int c = 0;
/* Check status register for receive errors. */
if (U1RCTL & RXERR) {
if (U1RCTL & FE) {
puts("rx framing error");
}
if (U1RCTL & OE) {
puts("rx overrun error");
}
if (U1RCTL & PE) {
puts("rx parity error");
}
if (U1RCTL & BRK) {
puts("rx break error");
}
/* Clear error flags by forcing a dummy read. */
c = U1RXBUF;
}
#ifdef MODULE_UART0
else if (uart0_handler_pid) {
c = U1RXBUF;
uart0_handle_incoming(c);
uart0_notify_thread();
}
#endif
}