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cpu/efm32: add RTT_FREQUENCY support to efm32

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make efm32 rtt frequency configurable by setting RTT_FREQUENCY
This commit is contained in:
Karl Fessel 2021-04-16 15:40:14 +02:00
parent 95a2456457
commit 4ff30a31e5
2 changed files with 77 additions and 3 deletions
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41
cpu/efm32/periph/rtt_series0.c
View File

@ -34,10 +34,47 @@ typedef struct {
static rtt_state_t rtt_state; static rtt_state_t rtt_state;
/* prescaler of 32768 = 1 s of resolution and overflow each 194 days */
#if RTT_FREQUENCY == 1
#define RTT_CMU_CLK_DIV cmuClkDiv_32768
#elif RTT_FREQUENCY == 2
#define RTT_CMU_CLK_DIV cmuClkDiv_16384
#elif RTT_FREQUENCY == 4
#define RTT_CMU_CLK_DIV cmuClkDiv_8192
#elif RTT_FREQUENCY == 8
#define RTT_CMU_CLK_DIV cmuClkDiv_4096
#elif RTT_FREQUENCY == 16
#define RTT_CMU_CLK_DIV cmuClkDiv_2048
#elif RTT_FREQUENCY == 32
#define RTT_CMU_CLK_DIV cmuClkDiv_1024
#elif RTT_FREQUENCY == 64
#define RTT_CMU_CLK_DIV cmuClkDiv_512
#elif RTT_FREQUENCY == 128
#define RTT_CMU_CLK_DIV cmuClkDiv_256
#elif RTT_FREQUENCY == 256
#define RTT_CMU_CLK_DIV cmuClkDiv_128
#elif RTT_FREQUENCY == 512
#define RTT_CMU_CLK_DIV cmuClkDiv_64
#elif RTT_FREQUENCY == 1024
#define RTT_CMU_CLK_DIV cmuClkDiv_32
#elif RTT_FREQUENCY == 2048
#define RTT_CMU_CLK_DIV cmuClkDiv_16
#elif RTT_FREQUENCY == 4096
#define RTT_CMU_CLK_DIV cmuClkDiv_8
#elif RTT_FREQUENCY == 8192
#define RTT_CMU_CLK_DIV cmuClkDiv_4
#elif RTT_FREQUENCY == 16384
#define RTT_CMU_CLK_DIV cmuClkDiv_2
#elif RTT_FREQUENCY == 32768
#define RTT_CMU_CLK_DIV cmuClkDiv_1
#else
#warning "no matching prescaler for RTT_FREQUENCY"
#endif
void rtt_init(void) void rtt_init(void)
{ {
/* prescaler of 32768 = 1 s of resolution and overflow each 194 days */ /* setup prescaler */
CMU_ClockDivSet(cmuClock_RTC, cmuClkDiv_32768); CMU_ClockDivSet(cmuClock_RTC, RTT_CMU_CLK_DIV);
/* enable clocks */ /* enable clocks */
CMU_ClockEnable(cmuClock_CORELE, true); CMU_ClockEnable(cmuClock_CORELE, true);

39
cpu/efm32/periph/rtt_series1.c
View File

@ -35,6 +35,43 @@ typedef struct {
static rtt_state_t rtt_state; static rtt_state_t rtt_state;
/* prescaler of 32768 = 1 s of resolution and overflow each 194 days */
#if RTT_FREQUENCY == 1
#define RTT_CMU_CLK_DIV rtccCntPresc_32768
#elif RTT_FREQUENCY == 2
#define RTT_CMU_CLK_DIV rtccCntPresc_16384
#elif RTT_FREQUENCY == 4
#define RTT_CMU_CLK_DIV rtccCntPresc_8192
#elif RTT_FREQUENCY == 8
#define RTT_CMU_CLK_DIV rtccCntPresc_4096
#elif RTT_FREQUENCY == 16
#define RTT_CMU_CLK_DIV rtccCntPresc_2048
#elif RTT_FREQUENCY == 32
#define RTT_CMU_CLK_DIV rtccCntPresc_1024
#elif RTT_FREQUENCY == 64
#define RTT_CMU_CLK_DIV rtccCntPresc_512
#elif RTT_FREQUENCY == 128
#define RTT_CMU_CLK_DIV rtccCntPresc_256
#elif RTT_FREQUENCY == 256
#define RTT_CMU_CLK_DIV rtccCntPresc_128
#elif RTT_FREQUENCY == 512
#define RTT_CMU_CLK_DIV rtccCntPresc_64
#elif RTT_FREQUENCY == 1024
#define RTT_CMU_CLK_DIV rtccCntPresc_32
#elif RTT_FREQUENCY == 2048
#define RTT_CMU_CLK_DIV rtccCntPresc_16
#elif RTT_FREQUENCY == 4096
#define RTT_CMU_CLK_DIV rtccCntPresc_8
#elif RTT_FREQUENCY == 8192
#define RTT_CMU_CLK_DIV rtccCntPresc_4
#elif RTT_FREQUENCY == 16384
#define RTT_CMU_CLK_DIV rtccCntPresc_2
#elif RTT_FREQUENCY == 32768
#define RTT_CMU_CLK_DIV rtccCntPresc_1
#else
#warning "no matching prescaler for RTT_FREQUENCY"
#endif
void rtt_init(void) void rtt_init(void)
{ {
/* enable clocks */ /* enable clocks */
@ -45,7 +82,7 @@ void rtt_init(void)
RTCC_Init_TypeDef init = RTCC_INIT_DEFAULT; RTCC_Init_TypeDef init = RTCC_INIT_DEFAULT;
init.enable = false; init.enable = false;
init.presc = rtccCntPresc_32768; init.presc = RTT_CMU_CLK_DIV;
RTCC_Reset(); RTCC_Reset();
RTCC_Init(&init); RTCC_Init(&init);