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Merge pull request #11304 from aabadie/pr/stm32_common/rtc_improve
stm32 common/rtc: reset the rtc when clock source has changed
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@ -31,6 +31,7 @@ extern "C" {
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*/
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#define CLOCK_HSI (16000000U) /* internal oscillator */
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#define CLOCK_CORECLOCK (32000000U) /* desired core clock frequency */
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#define CLOCK_LSE (1) /* enable low speed external oscillator */
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/* configuration of PLL prescaler and multiply values */
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/* CORECLOCK := HSI / CLOCK_PLL_DIV * CLOCK_PLL_MUL */
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@ -35,6 +35,7 @@ extern "C" {
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*/
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#define CLOCK_HSI (16000000U) /* internal oscillator */
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#define CLOCK_CORECLOCK (32000000U) /* desired core clock frequency */
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#define CLOCK_LSE (1) /* enable low speed external oscillator */
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/* configuration of PLL prescaler and multiply values */
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/* CORECLOCK := HSI / CLOCK_PLL_DIV * CLOCK_PLL_MUL */
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@ -138,6 +138,14 @@
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* offset of 100 years. */
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#define YEAR_OFFSET (100)
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/* Use a magic number to determine the initial RTC source. This will be used
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to know if a reset of the RTC is required at initialization. */
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#if CLOCK_LSE
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#define MAGIC_CLCK_NUMBER (0x1970)
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#else
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#define MAGIC_CLCK_NUMBER (0x1971)
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#endif
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static struct {
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rtc_alarm_cb_t cb; /**< callback called from RTC interrupt */
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void *arg; /**< argument passed to the callback */
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@ -186,6 +194,19 @@ static inline void rtc_lock(void)
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void rtc_init(void)
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{
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stmclk_dbp_unlock();
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#if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1)
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/* Compare the stored magic number with the current one. If it's different
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it means the clock source has changed and thus a RTC reset is
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required. */
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if (RTC->BKP0R != MAGIC_CLCK_NUMBER) {
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RCC->CSR |= RCC_CSR_RTCRST;
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RCC->CSR &= ~RCC_CSR_RTCRST;
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RTC->BKP0R = MAGIC_CLCK_NUMBER; /* Store the new magic number */
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}
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#endif
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stmclk_dbp_lock();
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/* enable low frequency clock */
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stmclk_enable_lfclk();
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