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stm32f2: add initialization of PLL I2S for MCO2

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To use it, add the following defines to your periph_conf.h:
/* prescaler for 8MHz I2S clock */
#define ENABLE_PLLI2S_MCO2  1
#define CLOCK_PLL_I2S_R     (6U)
#define CLOCK_PLL_I2S_N     (240U)
This commit is contained in:
Toon Stegen 2016-05-19 16:40:48 +02:00 committed by Vincent Dupont
parent ba23fb55f7
commit 5f6b182a8d
1 changed files with 19 additions and 0 deletions
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19
cpu/stm32f2/cpu.c
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@ -91,6 +91,25 @@ static void clk_init(void)
/* set main PLL division factor for USB OTG FS, SDIO and RNG clocks */
RCC->PLLCFGR |= (CLOCK_PLL_Q & 0x0F) << 24;
#ifdef ENABLE_PLLI2S_MCO2
/* reset PLL I2S config register */
RCC->PLLI2SCFGR = 0x00000000U;
/* set PLL I2S division factor */
RCC->PLLI2SCFGR |= (CLOCK_PLL_I2S_R & 0x07) << 28;
/* set PLL I2S multiplication factor */
RCC->PLLI2SCFGR |= (CLOCK_PLL_I2S_N & 0x1FF) << 6;
/* MCO2 output is PLLI2S */
RCC->CFGR |= (uint32_t) RCC_CFGR_MCO2_0;
RCC->CFGR &= ~(uint32_t) RCC_CFGR_MCO2_1;
/* MCO2 prescaler div by 5 */
RCC->CFGR |= (uint32_t) RCC_CFGR_MCO2PRE_0 | RCC_CFGR_MCO2PRE_1 | RCC_CFGR_MCO2PRE_2 ;
/* enable PLL I2S clock */
RCC->CR |= RCC_CR_PLLI2SON;
/* wait till PLL I2S clock is ready */
while ((RCC->CR & RCC_CR_PLLI2SRDY) == 0) {}
#endif
/* Enable PLL */
RCC->CR |= RCC_CR_PLLON;
/* Wait till PLL is ready */