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cpu: mips_pic32_common: Use mips32r2_isr_end in timer interrupt handler

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Signed-off-by: Francois Berder <18538310+francois-berder@users.noreply.github.com>
This commit is contained in:
Francois Berder 2020-01-10 21:52:55 +00:00
parent 7bbf21e2d3
commit 8f1c8298f3
1 changed files with 3 additions and 12 deletions
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15
cpu/mips_pic32_common/periph/timer.c
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@ -87,24 +87,15 @@ static void timer_isr(void)
*/
counter += TIMER_ACCURACY;
timer_isr_ctx.cb(timer_isr_ctx.arg, 0);
if (sched_context_switch_request) {
thread_yield();
}
mips32r2_isr_end();
}
if (counter == compares[1]) {
timer_isr_ctx.cb(timer_isr_ctx.arg, 1);
if (sched_context_switch_request) {
thread_yield();
}
mips32r2_isr_end();
}
if (counter == compares[2]) {
timer_isr_ctx.cb(timer_isr_ctx.arg, 2);
if (sched_context_switch_request) {
thread_yield();
}
mips32r2_isr_end();
}
mips_setcompare(mips_getcount() + TICKS_PER_US * TIMER_ACCURACY);