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cpu/esp32: fix GPIO32 and GPIO 33 as I2C pins

GPIO32 and GPIO33 are used during boot to start an 32.768 kHz XTAL if it is connected to these GPIOs. If the 32.768 kHz XTAL is not connected, these pins can be used digital IO. However, the 32.678 kHz XTAL has to be disabled explicitly in this case. Furthermore, the handling of GPIOs greater than GPIO31 had to be fixed in I2C software implementation.
This commit is contained in:
Gunar Schorcht 2020-04-17 18:35:09 +02:00
parent 2f75c60527
commit bb51fbb7ec
2 changed files with 3 additions and 2 deletions

View File

@ -228,6 +228,7 @@ static void IRAM system_clk_init (void)
rtc_select_slow_clk(RTC_SLOW_FREQ_32K_XTAL);
#else
/* set SLOW_CLK to internal low power clock of 150 kHz */
rtc_clk_32k_enable(false);
rtc_select_slow_clk(RTC_SLOW_FREQ_RTC);
#endif

View File

@ -54,8 +54,8 @@
#define I2C_CLOCK_STRETCH 200
/* gpio access macros */
#define GPIO_SET(l,h,b) if (b < 32) GPIO.l = BIT(b); else GPIO.h.val = BIT(32-b)
#define GPIO_GET(l,h,b) ((b < 32) ? GPIO.l & BIT(b) : GPIO.h.val & BIT(32-b))
#define GPIO_SET(l,h,b) if (b < 32) GPIO.l = BIT(b); else GPIO.h.val = BIT(b-32)
#define GPIO_GET(l,h,b) ((b < 32) ? GPIO.l & BIT(b) : GPIO.h.val & BIT(b-32))
#else /* MCU_ESP32 */