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cpu/msp430_common: add msp430-gcc-support-files 1.208

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This commit is contained in:
Kaspar Schleiser 2019-10-02 15:01:08 +02:00
parent 0268a772ed
commit bf072bdd55
20 changed files with 18192 additions and 0 deletions
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9
cpu/msp430_common/vendor/README.md vendored Normal file
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The folder "msp430-gcc-support-files" has been imported from this URL:
https://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPGCC/latest/exports/msp430-gcc-support-files-1.207.zip
Then cleaned up to remove currently unused (by RIOT) files:
$ _CPUS="$(git grep -o '^CPU_MODEL.=.*430.*$' | cut -d' ' -f 3 | sort -u)"
$ cd cpu/msp430_common/vendor/msp430-gcc-support-files/include
$ rm $(ls | grep -v -E '(msp430\.h|in430\.h|legacy\.h|iomacros\.h)' | \
grep -v -F "${_CPUS}" )

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cpu/msp430_common/vendor/msp430-gcc-support-files/Revisions_Header.txt vendored Normal file
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Build 1.208 (GCC)
=================
08/29/2019
New device support:
------------------
- None
New features / changes:
-----------------------
- Added support for blinking LED example
Bug fixes:
----------
- Fixed GNU compiler build options
- Added missing ALIGN directives for .preinit/init/fini_array sections in GCC
linker command files
Build 1.207 (GCC)
=================
02/14/2019
New device support:
------------------
- MSP430FR2676, MSP430FR2675, MSP430FR2476, MSP430FR2475
New features / changes:
-----------------------
- Updated definition of "__no_init" in in430.h
Bug fixes:
----------
- Corrected usage of NOPs in enable/disable interrupt macros in in430.h
- Removed invalid byte-access #defines (*_L/*_H) for DMA registers which only
allow word access from applicable device header files
Build 1.206 (GCC)
=================
07/26/2018
New device support:
------------------
- None
New features / changes:
-----------------------
- None
Bug fixes:
----------
- Added missing CPU errata compiler switches for MSP430FR2522, FR2512, FR2422
- Removed invalid SYSRSTIV_FLLUL #define from MSP430F5/F6 device header files
Build 1.205 (GCC)
=================
04/23/2018
New device support:
------------------
- MSP430FR2355, MSP430FR2353, MSP430FR2155, MSP430FR2153
New features / changes:
-----------------------
- None
Bug fixes:
----------
- Fixed another issue with .tinyram sections
Build 1.204 (GCC)
=================
12/21/2017
New device support:
------------------
- MSP430FR6043, MSP430FR6041, MSP430FR5043, MSP430FR5041,
MSP430FR60431, MSP430FR50431
New features / changes:
-----------------------
- Separated release notes by toolchain (CCS, IAR, GCC)
- Added build version number to device XML and GNU compiler options file
- Minor update in legacy.h
Bug fixes:
----------
- Added missing .tinyram assignments in applicable linker command files
Build 1.203
===========
10/05/2017
New device support:
------------------
- MSP430FR2522, MSP430FR2512, MSP430FR2422
New features / changes:
-----------------------
- Added -minrt option for GCC builds on devices with .5K of MAIN memory
Bug fixes:
----------
- Fixed name conflict in GCC linker files for FR2xx devices (INFO vs. INFOMEM)
Build 1.201
===========
06/28/2017
New device support:
------------------
- MSP430FR2100, MSP430FR2000
New features / changes:
-----------------------
- Enabled MPU by default for FR57xx family devices
- Moved toolchain specific CCS device XML files to separate folder (targetdb/options)
- Changed GCC linker files to place .persistent section into lower FRAM
- Changed GCC linker files to properly split rodata, data, bss and text sections for
devices with large memory
- Added a workaround to enable GCC project builds for FR6047 family in CCS
Bug fixes:
----------
- Fixed offset definitions for port registers in header files for newer devices
- Fixed linker options in *_TI CCS device XML files using -D instead of --define
- Fixed CCS linker files using __LARGE_DATA_MODEL__ instead of __LARGE_CODE_MODEL__
- Fixed inconsistencies in IAR SFR files for newer devices
Build 1.200
===========
05/31/2017
New device support:
------------------
- MSP430FR6047, MSP430FR60471, MSP4306045, MSP430FR6037, MSP430FR60371, MSP430FR6035
New features / changes:
-----------------------
- Moved toolchain specific data from CCS device XMLs to separate _TI/_GNU XMLs
- Added list of memory boundary defines to header files for newer devices
- Changed CCS device XMLs to activate MPU by default for applicable devices
Bug fixes:
----------
- Removed invalid linker- and IDE integration files for "generic" devices
- Fixed RAM boundaries for MSP430F67641 and MSP430F67641A
- As of last support files release 7.2.4: Fixed wrong -mmcu flags in GCC specific device
XML files
Known Limitations:
------------------
- MPU is not enabled by default on FR57xx family devices
==========================================================================================
Build 1.199 - 27.02.2017
==========================================================================================
15.02.2017 Several updates in legacy.h
10.02.2017 Minor change for calculated interrupt vector definitions in IAR header files
07.02.2017 Added --near_data=none option for devices with RAM in memory > 0x10000
06.02.2017 Fixed WDT base address and WDTCTL offset for FR4xx/FR2xx family devices
02.02.2017 Fixed an issue with INFO memory of FRAM devices being initialized on reset
02.02.2017 Fixed RAM boundaries for FR596x devices
02.02.2017 Changed I/O offset definitions to be relative to PORTx base for newer devices
13.12.2016 Enabled --gc-section compiler option for GCC builds
08.12.2016 Added mirrored RAM ranges to IAR menu files for applicable devices
==========================================================================================
Build 1.198 - 22.11.2016
==========================================================================================
18.11.2016 Added missing ADCRES control bits for FR4xx/FR2xx devices
04.10.2016 Fixed offset definitions for certain registers in modules DIO and RTC
04.10.2016 Removed duplicate and invalid defines in header files for newer devices
04.10.2016 Fixed comment format in all header files for newer devices
26.09.2016 Moved CPU architecture define in header to account for in430.h dependencies
==========================================================================================
Build 1.194 - 27.09.2016
==========================================================================================
26.09.2016 Updated in430.h for GCC and changed include order in GCC headers accordingly
==========================================================================================
release Package 19.09.2016
==========================================================================================
06.09.2016 Removed invalid INFOMEM definitions in GCC linker files for fr2xx devices
06.09.2016 Updated legacy.h with old LEA_SC definitions
06.09.2016 Renamed LEA_SC module to LEA (including all registers and other definitions)
==========================================================================================
release Package 10.06.2016
==========================================================================================
10.06.2016 Fixed typo in TI_COMPILER_VERSION check in CCS linker command files
01.06.2016 Corrected TLV address offsets in header files for G2xx/F2xx devices
==========================================================================================
release Package 20.05.2016
==========================================================================================
19.05.2016 Added SIGNATURE sections in GCC linker command files
19.05.2016 Removed invalid code from generic GCC symbol files
18.05.2016 Added silicon errata switches to GCC compiler options in CCS device XMLs
02.05.2016 Added missing register separator comments in header files for newer MSP430s
28.04.2016 Changed format of multi-JSTATE bit modules in IAR menu files
12.04.2016 Added missing alternate register definitions (RTCCNT) for devices with RTC_C
==========================================================================================
release Package 11.04.2016
==========================================================================================
11.04.2016 Added missing register definition macros to iomacros.h for GCC
08.04.2016 Added missing __MSP430_HAS_P*SEL__ definitions in F1xx/F2xx/F4xx headers
08.04.2016 Fixed typo in GCC linker files
05.04.2016 Fixed debug_line option in GCC linker files for smaller memory devices
==========================================================================================
release Package 31.03.2016
==========================================================================================
31.03.2016 Fixed register definitions in GCC header files for FR5994 and FR2311 family
31.03.2016 Removed invalid header and support files for FR5994 family devices
==========================================================================================
release Package 30.03.2016
==========================================================================================
30.03.2016 Changed 16bit access definitions for 32bit registers in GCC headers
29.03.2016 Enhanced DEFWL macro in IAR header files
29.03.2016 Corrected family definition for several FR2xx devices
29.03.2016 Removed unnecessary memory allocation in GCC linker files
29.03.2016 Added legacy definitions for FR413x BKMEM module
==========================================================================================
release Package 24.03.2016
==========================================================================================
24.03.2016 Added ADC10PDIV_3 definition to resolve backwards compatibility issues
==========================================================================================
release Package 02.03.2016
==========================================================================================
02.03.2016 Updated compiler workaround switches in CCS xml files
==========================================================================================
release Package 03.02.2016
==========================================================================================
27.01.2016 Added: MSP430FR5994, MSP430FR5992, MSP430FR5964, MSP430FR5962, MSP430FR5894,
MSP430FR5892, MSP430FR5864, MSP430FR5862
Added: MSP430FR2311, MSP430FR2310
==========================================================================================
release Package 22.12.2015
==========================================================================================
21.12.2015 Revised TAG_ADC10_1 values for applicable devices
16.12.2015 Added upper bss section in GCC linker files
15.12.2015 Removed invalid LCD definitions in CC430F514x header and support files
02.12.2015 Removed invalid ADC10PDIV_3 definitions for MSP430F5247 and related devices
02.12.2015 Added CAPTIVATE registers
16.11.2015 Added mhwmult option in the GNU Compiler option with the CCS device.xml files
09.11.2015 Fixed AESOP_2 and AESOP_3 comments mismatch and typo
09.11.2015 Added new GCC linker symbols files
09.11.2015 Added missing GCC linker option in CCS xml files
04.11.2015 CCS linker file memory regions split
==========================================================================================
release Package 29.10.2015
==========================================================================================
28.10.2015 Added GCC linker heap memory support
==========================================================================================
release Package 27.10.2015
==========================================================================================
20.10.2015 Updated CCS cmd file for IPE signature
14.10.2015 CCS linker file: fixed mapping of manual IPE configuration to right memory range
13.10.2015 updated a comment in the GCC linker file (.noinit)
13.10.2015 Restructured memory segment output for GCC linker files
13.10.2015 Added: MSP430FR2532, MSP430FR2533, MSP430FR2632, MSP430FR2633
06.10.2015 Added INFO memory tag in IAR menu files
28.09.2015 Added BSL memory tag in IAR menu files
24.09.2015 Fixed mirrored RAM section for F6659
15.09.2015 Changed IAR linker files to support MPU + IPE enabled together
15.09.2015 Corrected RAM memory range in lnk430f5359.xcl
14.09.2015 Removed 0x400 offset for IPEEND
14.09.2015 Add a .ipe_const section for constants in the IPE area in CCS linker files
14.09.2015 Added new IAR menu file features requested by IAR
14.09.2015 Added ram func feature for CCS
==========================================================================================
release Package 10.08.2015
==========================================================================================
29.07.2015 Updated comments for USCI IV Bit definitions
==========================================================================================
release Package 17.07.2015
==========================================================================================
17.07.2015 Fixed issue with BSL signature overlapping with interrupt vectors
16.07.2015 Fixed DMA issue in msp430frxx_6xxgeneric.h
14.07.2015 Add new definitions for Driverlib to differentiate SYSCFG2 bits
09.07.2015 F673xA: added missing 3rd SD24 Channel definition
29.06.2015 FR59xx and FR69xx: removed not available defines for SYSSNIV_SVS and SYSSNIV_ACCTEIFG
09.06.2015 F677x: fixed wrong define DMAxTSEL__USCIB3TX to DMAxTSEL__USCIA3TX
16.04.2015 added: RF430F5175 RF430F5155 RF430F5144
added: MSP430FR5922 MSP430FR59221
02.04.2015 Updated Segment size and calculation for FR57xx devices
==========================================================================================
release Package 25.03.2015
==========================================================================================
13.03.2015 updated IAR xcl file format
18.02.2015 added Port 7 for MSP430F5239
==========================================================================================
release Package 04.02.2015
==========================================================================================
31.07.2014 LCD_B and LCD_C: added missing LCDBLKPRE_x and LCDDIV_x definitions
25.07.2014 G2xx1,G2xx2,G2xx3: added dummy TRAPINT_VECTOR interrupt vector as bugfix for USCI29
16.07.2014 FR5xx/FR6xx: added define SYSRSTIV_ACCTEIFG
04.07.2014 ESI: Renamed bit ESIVCC2 to ESIVMIDEN, renamed bit ESIVSS to ESISHTSM
==========================================================================================
release Package 29.06.2014
==========================================================================================
25.06.2014 Updated MPU inplementation into CCS Linker Command files
==========================================================================================
release Package 29.04.2014
==========================================================================================
==========================================================================================
release Package 21.01.2014
==========================================================================================
20.01.2014 Added Version Tag to Linker command files (identical to header files)
updated Signature defintion for CCS in linker command files
replaced MirrowRAMEnd with MirrowedRAMEnd
added MSP430F677xA devices
21.11.2013 MSP430F665x: Added USCI_A2 and USCI_B2 to DMA Trigger Table
20.11.2013 CCS: updated path for mathlib (4xx/5xx version)
11.11.2013 MSP430i20xx: fixed TAxIV_TAIFG definition
31.10.2013 MSP430G25xx: updated tags for TLV data
24.07.2013 MSP430FR59xx: Replaced NACCESSx with NWAITSx
23.07.2013 Module LDOPWR: fixed wrong define of LDOEN (from LDOOEN)
==========================================================================================
release Package 18.07.2013
==========================================================================================
18.07.2013 CCS: added code template support
11.07.2013 removed not available PxDS Register definitions
==========================================================================================
release Package 09.07.2013
==========================================================================================
09.07.2013 fixed identifier for debugger for MSP430i devices
added base address define for MSP430i devices
==========================================================================================
release Package 28.06.2013
==========================================================================================
28.06.2013 added P7 to MSP430F5237
10.06.2013 updated CCS linker command file for devices with MPU
10.06.2013 added MSP430I20xx and MSP430F525x devices
10.05.2013 MSP430F51x2 Fixed Typo PM_UCB0SOMO -> PM_UCB0SOMI
==========================================================================================
release Package 08.05.2013
==========================================================================================
25.04.2013 fixed RAM size for MSP430G2102 and MSP430G2132
==========================================================================================
release Package 19.03.2013
==========================================================================================
15.03.2013 added RTCAE bits to RTC Module
11.03.2013 added DCOR to MSP430G2x55 devices
added 5xx style defintions for 2xx/4xx devices for TA0IV Register
fixed some typos in 5xx/6xx device with TimerA/B Interrupt vector definitions
10.02.2013 fixed size of Signature in FRAM Devices
==========================================================================================
release Package 31.01.2013
==========================================================================================
31.01.2013 added MSP430G2755, MSP430G2855, MSP430G2955
15.01.2013 changed defines to CapTouchIO from CapSenseIO to align with Users Guide
13.12.2012 Module name changed from RTC_CE to RTC_C
13.12.2012 CCS: Removed Legacy CCE V2 defines for Interrupt Vectors
14.11.2012 fixed missing UCA1 in FR57x3/7
14.11.2012 FR56xx: fixed typo in SYSRSTIV_MPUSEG defintions
replaced COMP_B with COMP_E
==========================================================================================
release Package 13.11.2012
==========================================================================================
24.10.2012 replaced define TBSSEL__TACLK with TBSSEL__TBCLK
ADC12B: fixed some Typos in ADC12 definitions (ADC10 was used before)
28.09.2012 USB devices: removed UPCS0 definition
==========================================================================================
release Package 25.09.2012
==========================================================================================
25.09.2012 F677x: added Comp B to Interrupt Vector Table
21.09.2012 CCS: fixed issue with Board files under Linux
18.09.2012 added Signature Memory Segments to linker command file
12.09.2012 CCS: added USB RAM segment to linker command file
16.08.2012 added MSP430F6x5x and MSP430F5x5x devices
added MSP430F677x devices
17.07.2012 Updated PxSELC register address to offset 0x16 (instead of 0x10)
MSP430FR58xx/MSP430FR59xx replaced Comperator B with Comperator E
28.06.2012 Added TimerD Cal Tag for TLV Table (Devices with TimerD only)
13.06.2012 Fixed definitions for LCD: VLCD_13, VLCD_14, VLCD_3_26, VLCD_3_32
13.06.2012 F67xx: Removed not available Bits SD24BINCHx
==========================================================================================
release Package 12.06.2012
==========================================================================================
31.05.2012 added MSP430SL5438A
31.05.2012 CC430: removed not available Definitions: RF1AIFIV_RFRXIFG and RF1AIFIV_TFRXIFG
29.05.2012 FR596x devices
03.05.2012 MSP430FR57xx: removed not available PxDS Registers
==========================================================================================
release Package 30.03.2012
==========================================================================================
30.03.2012 MSP430F53xx, MSP430F52xx and MSP430F67xx: removed RCRS7OFF
29.03.2012 MSP430F66xx: Added for defines for SYSSNIV_SVMLVLRIFG and SYSSNIV_SVMHVLRIFG
==========================================================================================
release Package 19.03.2012
==========================================================================================
13.03.2012 added MSP430FR5969
22.02.2012 CCS: removed --advice:power=all and --advice:power_severity=remark from XML file
changed default output format from coff to elf
added addtional data segments to linker command file
17.02.2012 Fixed UCBxSTAT display size in Debugger
15.02.2012 CCS: Moved Modules to msp430 sub folder
08.02.2012 CCS: updated MPU section:__mpusam = 0x7513;
updated MPU section:__mpuseg incremented by one if MemSize = x.5;
18.01.2012 CCS: added .data Section (required for SYSBIOS)
18.01.2012 CCS: changed pathes to use / instead of \ within XML files
CCS: package with unix style linefeeds added
13.01.2012 ADC12B removed ADC12DIF for odd Registers
added defines for TimerA Interrrupt vectors to Timer0_A
11.01.2012 Updated Comment for UC7BIT
Fixed Typo for MC__CONTINOUS (legacy definition for old define added)
==========================================================================================
release Package 14.12.2011
==========================================================================================
13.12.2011 Updated all FR57xx device to have 1k RAM
28.11.2011 Fixed the G2230 and G2210 Menu file, leading to the device being reported as incorrect.
28.11.2011 Changed format of Interrupt Table in CCS V5 for ULP Advisor check
added Tag to CCS V5 XML files to enalbe ULP Advisor
removed -o0 option in CCS V4
02.11.2011 updated FRAM error flag names for FR57xx
removed MPULOCK bit
20.10.2011 added More memory information (RAM2/ USB RAM / Mirrowed RAM)
14.10.2011 added TLV do MSP430XGenergic
==========================================================================================
release Package 01.10.2011
==========================================================================================
29.09.2011 fixed Typo in comment of TASSEL0/1
==========================================================================================
release Package 30.09.2011
==========================================================================================
29.09.2011 added G2230 and the G2210
==========================================================================================
15.09.2011 CCS: added Board Files
15.09.2011 IAR: added Tag if INFOA can be locked
==========================================================================================
release Package 10.08.2011
==========================================================================================
03.08.2011 CCS: changed Stack and BSS location for FRAM devices to RAM
02.08.2011 added Devices: F522x, F643x. F533x, FR57xx; F67xx, CC430F614x, CC430F51xx
02.08.2011 added Devices: GenericX Device
03.08.2011 Fixed definition of RTCTEV__0000 and RTCTEV__1200
==========================================================================================
release Package 24.06.2011
==========================================================================================
09.06.2011 F663x: fixed wrong definitions in DMA Trigger 7 and 8
==========================================================================================
release Package 09.06.2011
==========================================================================================
09.06.2011 CPU BUG30 added for IAR
fixed comment of Peripheral section in IAR XCL files (5xx devices only)
added bit defintions for PAIN, PBIN,.. in XML and sfr files
25.05.2011 F663x and FR573: Fixed definition of RTCTEV__0000 and RTCTEV__1200
Removed not availabe bits RTCMODE and RTCSSELx
12.05.2011 Fixed SD24 Tag for AFE253 (3 SD) devices
19.04.2011 Added base address of 5xx modules
added PxSELC registers for FRAM devices
07.04.2011 Fixed typo LCD_C (VLCD) definitions
29.03.2011 Fixed Memory (RAM) for Fg477 and F477
16.03.2011 Fixed typo in comment of AFE devices
Removed SD24CONF0 in AFE devices
Removed caldata for 1MHZ and 16MHZ in AFE devices
==========================================================================================
release Package 08.03.2011
==========================================================================================
07.03.2011 Set some FR57xx devices and all AFE device to released
07.03.2011 Updated FR57xx devices
04.03.2011 Added P3SEL for G2x53
28.02.2011 IAR: added LPM5 Tag
09.12.2010 F530x: added PU (USB LDO)
08.12.2010 CCS: SD16: removed wrong entries in SD16 xml file
06.12.2010 USB: added alternate define USBIV - USBVECINT
16.11.2010 F51x2: Fixed PortMapper Definitons
==========================================================================================
release Package 11.11.2010
==========================================================================================
11.11.2010 Removed Port4 in CC430F51xx devices
09.11.2010 Added Devices to release package: Kryton, AFE253, F532x, F532x, F534x, BT5xxx
updated PortU and USB defintions according to UG
changed access type to Timer A/B/D to word only
15.10.2010 Added FW428/FW429
15.10.2010 A-Pool: added LCMP : A-POOL Latch comparator
==========================================================================================
release Package 23.09.2010
==========================================================================================
14.09.2010 Fixed ADC12 (2xx/4xx) sfr file for ADC12MCTL
Removed DCOR bit in 5xx devices according UG
==========================================================================================
release Package 09.08.2010
==========================================================================================
==========================================================================================
release Package 06.08.2010
==========================================================================================
03.08.2010 Replaced PSSKEY with PMMKEY on some older 5xx devices
removed archiving of old Modules
added Device Prefix for Modules on non-released devices
==========================================================================================
release Package 28.07.2010
==========================================================================================
27.07.2010 CCS-XML: added FilterString
26.07.2010 removed P7/P8/PA from F24x
26.07.2010 removed USCI 2/3 from 5418/5435/5437
released device for Aug 2010 update
10.07.2010 set L092 to normal CPU instead of CPUX
05.07.2010 F471x3 Fixed Definition SD16MEMx, SD16IV
05.07.2010 F5xx: added missing & for ADC12MEM
05.07.2010 F663x removed EDI
==========================================================================================
release Package 17.06.2010
==========================================================================================
16.06.2010 CCS: removed for inbetween release: Family Tag to XML files
11.06.2010 added support for GCC
10.06.2010 Updated some OSCCAP settings for the F47xx devices
09.06.2010 CCS: added Family Tag to XML files
07.06.2010 Updated F47126/F47127 source files (fixed missing DMA and RTC)
==========================================================================================
release Package 27.05.2010
==========================================================================================
17.05.2010 CCS: added support Large/Small Memory Model in CCS cmd files
17.05.2010 added support for F438/F438 spins
==========================================================================================
release Package 17.05.2010
==========================================================================================
17.05.2010 Removed L092EMU device
04.05.2010 released L092 devices
27.04.2010 added missing CG461x devices
15.03.2010 FE42x2: Fixed swapped IRMS and IRMS_2 definitions
==========================================================================================
release Package 16.03.2010
==========================================================================================
15.03.2010 changed FETSTRING for F20x1 and F20x2 due to Argon Devices
added F6638 and F5510 to release package
updated EEM info for 5xx
09.03.2010 updated EEM info for many devices (F5xx with 3 BKPT , F4719x)
08.03.2010 IAR: replaced <In430.h> with "in430.h" as requested by A.Dannenberg /SDO
05.03.2010 5xx: Changed access type of DMAxSZ registers to word only
26.02.2010 removed XT2 from F5172 (int)
26.02.2010 updated PM on F5510 (int)
16.02.2010 updated comment in F41x2
09.02.2010 CCS: replaced <In430.h> with "in430.h" as requested by A.Dannenberg /SDO
==========================================================================================
release Package 25.01.2010 (new update and with label applied)
==========================================================================================
25.01.2010 released F51x2
25.01.2010 CCS: fixed bug in generation of XML files
==========================================================================================
release Package 16.12.2009 (new update and with label applied)
==========================================================================================
16.12.2009 updated defintions for KEY and PW (Password) as requested by system
PW register will cause PUC on wrong access / Key just ignores
08.12.2009 CCS: added support of ENUM generation in XML files
08.12.2009 Fixed typo in ADC10: SREF3 -> SREF2
02.12.2009 CCS: fixed definitin of RESET_VECTOR for ASM
01.12.2009 added u-type castings for #defines into IAR header file
01.12.2009 some comment cleanup in ADC12/ADC10 done
26.11.2009 fixed typo WDTSSEL__SCMLK -> WDTSSEL__SMCLK
20.11.2009 Removed support for old TI ASM
16.11.2009 CC430: removed XT2DRIVE_x definitions
==========================================================================================
release Package 11.11.2009 (new update and with label applied)
==========================================================================================
10.11.2009 activated description field for CCS
==========================================================================================
release Package 10.11.2009 (new update and with label applied)
==========================================================================================
10.11.2009 F23x0: added dummy TRAPINT_VECTOR interrupt vector as bugfix for USCI29
10.11.2009 implemented description field for CCS
10.11.2009 fixed type enalbe in several modules
==========================================================================================
release Package 04.11.2009 (new update and with label applied)
==========================================================================================
05.11.2009 changed grouping of Port Mapping
04.11.2009 updated TAG_ADC12_1 and TAG_ADC10_1 to 0x08
03.11.2009 Fixed error in Port Mapping
29.10.2009 Added several new device spins
26.10.2009 MSP430FE42x2: Fixed swapped IRMS_2 definitions
30.09.2009 L092/C092: set CPU type to CPUX (pre request from Team)
29.09.2009 PMM: updated LOCKBAK to LOCKIO as shown in the UG LOCKBAK is used by RTC, added LOCKLPM5
27.08.2009 IAR: added CPU Tag for menu files (BTT556)
24.08.2009 CCS: fixed error in ASM int generation for numbers below 10
19.08.2009 fixed wrong Ram size for F5527 -> 0x3BFF
19.08.2009 removed Port D on F55xx devcie with 64 pin package
12.08.2009 added 51x1 to internal devices
==========================================================================================
release Package 20.07.2009
==========================================================================================
10.08.2009 updated RAM sizes of CC430F6137/CC430F5137
07.08.2009 updated header of CCS cmd files according to Andreas D. recommendations
05.08.2009 F55xx fixed type in DMA Trigger Defs
04.08.2009 implemented generation of dedicated header files
16.06.2009 implemented splitt of USCI modules
06.06.2009 made TAxIV and TBxIV registers for 5xx devices writeable
removed SYSARB register in 5xx SYS module
==========================================================================================
release Package 03.06.2009 / 07.06.2009
==========================================================================================
03.06.2009 added CHECKSUM to IAR xcl files
23.06.2009 F5xx: xml files: USCI - I2C added missing bits
23.06.2009 F5xx: sfr files: MPY - added missing bits for MPYCTL and SUMEXT
05.05.2009 F5xx: Flash - removed some bits according to UG (EEI / EEIEX)
05.05.2009 CC430 devices: changed RTC_A_VECTOR to RTC_VECTOR
05.05.2009 CCS4: implemented ISR definition for ASM header files
05.05.2009 CCS4: split of CMD files implemented
04.05.2009 updated USB related header files
04.05.2009 updated MSP430.h files + special file for IAR
04.05.2009 IAR: replaced __IAR_SYSTEMS_ICC with __IAR_SYSTEMS_ICC__
17.04.2009 IAR: replace 20 Bit register access with short access (only allowed in small memory model)
16.04.2009 Updated Comments for Comp.B (Ref Resitor divider and COMP_B_ISR Vector)
Removed XT1OFIFG from F552x and F551x
14.04.2009 added Target VCC to menu and xml files
==========================================================================================
release Package 25.03.2009
==========================================================================================
23.03.2009 fixed error in Imagecraft files for 5xx devices
23.03.2009 replaced label for RSTWU/PORTWU to LPM5WU
23.03.2009 F41x2 removed LFXT1DIG
23.03.2009 Added TLV and DMA definitions for 5xx devices
16.03.2009 fixed wrong LCDMEM usage
26.02.2009 updated MSP430L092
24.02.2009 removed SD16CONFx registers from SFR files
==========================================================================================
release Package 11.02.2009
==========================================================================================
11.02.2009 released CC430 devices
09.02.2009 removed some XT2 bits from F41x2,
added comment to new release files F41x2, F471x6, F471x7, F47x, FG47x
04.02.2009 released F41x2
30.01.2009 released F471x6, F471x7, F47x, FG47x
29.01.2009 fixed error in LCDB
20.01.2009 added byte alarm Register definitions for RTC in 5xx family
20.01.2009 F41x2 replaced LCD with LCDA
15.01.2009 5xx LCD_B fixed wrong alignment in #define LCDDIV__1
18.12.2008 Added PMMLPM5xxx def to PMM
20.11.2008 Added <cyclecounter> and <iv_base> Tags
17.11.2008 Added msp430x241x.h
14.11.2008 Added RTxPS to F5xx devices
Added missing USCI registers F5xx devices
removed wrong byte definitions on *.cmd files (5xx)
06.11.2008 FE42x2 do not have HWMPY
05.11.2008 reduce RAM for CC430 by 2 to avoid bug with Stackpointer
30.10.2008 added additional FLL bits for F42x2
moved INTVEC legacy defs of TB0 to module
added LFXT1DIG to some devices
27.10.2008 changed name for TB to TB0 in F5xx/F6xx devices
23.10.2008 removed LCDB size bits
changed VLCDx bits from 8 to 9
changed CCE printf default to minimal
15.10.2008 added CCS 4.0 package
13.10.2008 updated RAM config for F552x/F551x
10.10.2008 change style for V2 style interrupts defintion in CCE
removed unused defintions in PMM
updated RF defintions for CC1101
04.09.2008 increased Stack/Heap size for large Ram Devices
03.09.2008 removed P10 from TC0701
added USBPLL definitions
26.08.2008 stopped support for IAR_V1 and CCE V1, CCE V2 (files now longer will be updated)
26.08.2008 fixed wrong bit in UCS UCSUNLOCKHIST1
added SD16XDIV2 to sfr files
25.08.2008 added Missing FCTL2 bits in sfr files. Updated FX47x files added Missing FCTL2 bits in sfr files. Updated FX47x files
20.08.2008 updated FG47x files with some OA bits updated FG47x files with some OA bits
19.08.2008 added F471x6 added F471x6
31.07.2008 updated FG47x and F47x with SD16BUF updated FG47x and F47x with SD16BUF

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cpu/msp430_common/vendor/msp430-gcc-support-files/include/cc430f6137.ld vendored Normal file
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/* ============================================================================ */
/* Copyright (c) 2019, Texas Instruments Incorporated */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* * Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* * Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* */
/* * Neither the name of Texas Instruments Incorporated nor the names of */
/* its contributors may be used to endorse or promote products derived */
/* from this software without specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ============================================================================ */
/* This file supports CC430F6137 devices. */
/* Version: 1.208 */
/* Default linker script, for normal executables */
OUTPUT_ARCH(msp430)
ENTRY(_start)
MEMORY {
SFR : ORIGIN = 0x0000, LENGTH = 0x0010 /* END=0x0010, size 16 */
BSL : ORIGIN = 0x1000, LENGTH = 0x0800
RAM : ORIGIN = 0x1C00, LENGTH = 0x0FFE /* END=0x2BFD, size 4094 */
INFOMEM : ORIGIN = 0x1800, LENGTH = 0x0200 /* END=0x19FF, size 512 as 4 128-byte segments */
INFOA : ORIGIN = 0x1980, LENGTH = 0x0080 /* END=0x19FF, size 128 */
INFOB : ORIGIN = 0x1900, LENGTH = 0x0080 /* END=0x197F, size 128 */
INFOC : ORIGIN = 0x1880, LENGTH = 0x0080 /* END=0x18FF, size 128 */
INFOD : ORIGIN = 0x1800, LENGTH = 0x0080 /* END=0x187F, size 128 */
ROM (rx) : ORIGIN = 0x8000, LENGTH = 0x7F80 /* END=0xFF7F, size 32640 */
VECT1 : ORIGIN = 0xFF80, LENGTH = 0x0002
VECT2 : ORIGIN = 0xFF82, LENGTH = 0x0002
VECT3 : ORIGIN = 0xFF84, LENGTH = 0x0002
VECT4 : ORIGIN = 0xFF86, LENGTH = 0x0002
VECT5 : ORIGIN = 0xFF88, LENGTH = 0x0002
VECT6 : ORIGIN = 0xFF8A, LENGTH = 0x0002
VECT7 : ORIGIN = 0xFF8C, LENGTH = 0x0002
VECT8 : ORIGIN = 0xFF8E, LENGTH = 0x0002
VECT9 : ORIGIN = 0xFF90, LENGTH = 0x0002
VECT10 : ORIGIN = 0xFF92, LENGTH = 0x0002
VECT11 : ORIGIN = 0xFF94, LENGTH = 0x0002
VECT12 : ORIGIN = 0xFF96, LENGTH = 0x0002
VECT13 : ORIGIN = 0xFF98, LENGTH = 0x0002
VECT14 : ORIGIN = 0xFF9A, LENGTH = 0x0002
VECT15 : ORIGIN = 0xFF9C, LENGTH = 0x0002
VECT16 : ORIGIN = 0xFF9E, LENGTH = 0x0002
VECT17 : ORIGIN = 0xFFA0, LENGTH = 0x0002
VECT18 : ORIGIN = 0xFFA2, LENGTH = 0x0002
VECT19 : ORIGIN = 0xFFA4, LENGTH = 0x0002
VECT20 : ORIGIN = 0xFFA6, LENGTH = 0x0002
VECT21 : ORIGIN = 0xFFA8, LENGTH = 0x0002
VECT22 : ORIGIN = 0xFFAA, LENGTH = 0x0002
VECT23 : ORIGIN = 0xFFAC, LENGTH = 0x0002
VECT24 : ORIGIN = 0xFFAE, LENGTH = 0x0002
VECT25 : ORIGIN = 0xFFB0, LENGTH = 0x0002
VECT26 : ORIGIN = 0xFFB2, LENGTH = 0x0002
VECT27 : ORIGIN = 0xFFB4, LENGTH = 0x0002
VECT28 : ORIGIN = 0xFFB6, LENGTH = 0x0002
VECT29 : ORIGIN = 0xFFB8, LENGTH = 0x0002
VECT30 : ORIGIN = 0xFFBA, LENGTH = 0x0002
VECT31 : ORIGIN = 0xFFBC, LENGTH = 0x0002
VECT32 : ORIGIN = 0xFFBE, LENGTH = 0x0002
VECT33 : ORIGIN = 0xFFC0, LENGTH = 0x0002
VECT34 : ORIGIN = 0xFFC2, LENGTH = 0x0002
VECT35 : ORIGIN = 0xFFC4, LENGTH = 0x0002
VECT36 : ORIGIN = 0xFFC6, LENGTH = 0x0002
VECT37 : ORIGIN = 0xFFC8, LENGTH = 0x0002
VECT38 : ORIGIN = 0xFFCA, LENGTH = 0x0002
VECT39 : ORIGIN = 0xFFCC, LENGTH = 0x0002
VECT40 : ORIGIN = 0xFFCE, LENGTH = 0x0002
VECT41 : ORIGIN = 0xFFD0, LENGTH = 0x0002
VECT42 : ORIGIN = 0xFFD2, LENGTH = 0x0002
VECT43 : ORIGIN = 0xFFD4, LENGTH = 0x0002
VECT44 : ORIGIN = 0xFFD6, LENGTH = 0x0002
VECT45 : ORIGIN = 0xFFD8, LENGTH = 0x0002
VECT46 : ORIGIN = 0xFFDA, LENGTH = 0x0002
VECT47 : ORIGIN = 0xFFDC, LENGTH = 0x0002
VECT48 : ORIGIN = 0xFFDE, LENGTH = 0x0002
VECT49 : ORIGIN = 0xFFE0, LENGTH = 0x0002
VECT50 : ORIGIN = 0xFFE2, LENGTH = 0x0002
VECT51 : ORIGIN = 0xFFE4, LENGTH = 0x0002
VECT52 : ORIGIN = 0xFFE6, LENGTH = 0x0002
VECT53 : ORIGIN = 0xFFE8, LENGTH = 0x0002
VECT54 : ORIGIN = 0xFFEA, LENGTH = 0x0002
VECT55 : ORIGIN = 0xFFEC, LENGTH = 0x0002
VECT56 : ORIGIN = 0xFFEE, LENGTH = 0x0002
VECT57 : ORIGIN = 0xFFF0, LENGTH = 0x0002
VECT58 : ORIGIN = 0xFFF2, LENGTH = 0x0002
VECT59 : ORIGIN = 0xFFF4, LENGTH = 0x0002
VECT60 : ORIGIN = 0xFFF6, LENGTH = 0x0002
VECT61 : ORIGIN = 0xFFF8, LENGTH = 0x0002
VECT62 : ORIGIN = 0xFFFA, LENGTH = 0x0002
VECT63 : ORIGIN = 0xFFFC, LENGTH = 0x0002
RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002
}
SECTIONS
{
__interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) } > VECT1
__interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2
__interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) } > VECT3
__interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) } > VECT4
__interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5
__interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) } > VECT6
__interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) } > VECT7
__interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) } > VECT8
__interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) } > VECT9
__interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) } > VECT10
__interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) } > VECT11
__interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) } > VECT12
__interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) } > VECT13
__interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) } > VECT14
__interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) } > VECT15
__interrupt_vector_16 : { KEEP (*(__interrupt_vector_16)) } > VECT16
__interrupt_vector_17 : { KEEP (*(__interrupt_vector_17)) } > VECT17
__interrupt_vector_18 : { KEEP (*(__interrupt_vector_18)) } > VECT18
__interrupt_vector_19 : { KEEP (*(__interrupt_vector_19)) } > VECT19
__interrupt_vector_20 : { KEEP (*(__interrupt_vector_20)) } > VECT20
__interrupt_vector_21 : { KEEP (*(__interrupt_vector_21)) } > VECT21
__interrupt_vector_22 : { KEEP (*(__interrupt_vector_22)) } > VECT22
__interrupt_vector_23 : { KEEP (*(__interrupt_vector_23)) } > VECT23
__interrupt_vector_24 : { KEEP (*(__interrupt_vector_24)) } > VECT24
__interrupt_vector_25 : { KEEP (*(__interrupt_vector_25)) } > VECT25
__interrupt_vector_26 : { KEEP (*(__interrupt_vector_26)) } > VECT26
__interrupt_vector_27 : { KEEP (*(__interrupt_vector_27)) } > VECT27
__interrupt_vector_28 : { KEEP (*(__interrupt_vector_28)) } > VECT28
__interrupt_vector_29 : { KEEP (*(__interrupt_vector_29)) } > VECT29
__interrupt_vector_30 : { KEEP (*(__interrupt_vector_30)) } > VECT30
__interrupt_vector_31 : { KEEP (*(__interrupt_vector_31)) } > VECT31
__interrupt_vector_32 : { KEEP (*(__interrupt_vector_32)) } > VECT32
__interrupt_vector_33 : { KEEP (*(__interrupt_vector_33)) } > VECT33
__interrupt_vector_34 : { KEEP (*(__interrupt_vector_34)) } > VECT34
__interrupt_vector_35 : { KEEP (*(__interrupt_vector_35)) } > VECT35
__interrupt_vector_36 : { KEEP (*(__interrupt_vector_36)) } > VECT36
__interrupt_vector_37 : { KEEP (*(__interrupt_vector_37)) } > VECT37
__interrupt_vector_38 : { KEEP (*(__interrupt_vector_38)) } > VECT38
__interrupt_vector_39 : { KEEP (*(__interrupt_vector_39)) } > VECT39
__interrupt_vector_40 : { KEEP (*(__interrupt_vector_40)) } > VECT40
__interrupt_vector_41 : { KEEP (*(__interrupt_vector_41)) } > VECT41
__interrupt_vector_42 : { KEEP (*(__interrupt_vector_42)) } > VECT42
__interrupt_vector_43 : { KEEP (*(__interrupt_vector_43)) } > VECT43
__interrupt_vector_44 : { KEEP (*(__interrupt_vector_44)) } > VECT44
__interrupt_vector_45 : { KEEP (*(__interrupt_vector_45)) } > VECT45
__interrupt_vector_46 : { KEEP (*(__interrupt_vector_46)) KEEP (*(__interrupt_vector_aes)) } > VECT46
__interrupt_vector_47 : { KEEP (*(__interrupt_vector_47)) KEEP (*(__interrupt_vector_rtc)) } > VECT47
__interrupt_vector_48 : { KEEP (*(__interrupt_vector_48)) KEEP (*(__interrupt_vector_lcd_b)) } > VECT48
__interrupt_vector_49 : { KEEP (*(__interrupt_vector_49)) KEEP (*(__interrupt_vector_port2)) } > VECT49
__interrupt_vector_50 : { KEEP (*(__interrupt_vector_50)) KEEP (*(__interrupt_vector_port1)) } > VECT50
__interrupt_vector_51 : { KEEP (*(__interrupt_vector_51)) KEEP (*(__interrupt_vector_timer1_a1)) } > VECT51
__interrupt_vector_52 : { KEEP (*(__interrupt_vector_52)) KEEP (*(__interrupt_vector_timer1_a0)) } > VECT52
__interrupt_vector_53 : { KEEP (*(__interrupt_vector_53)) KEEP (*(__interrupt_vector_dma)) } > VECT53
__interrupt_vector_54 : { KEEP (*(__interrupt_vector_54)) KEEP (*(__interrupt_vector_cc1101)) } > VECT54
__interrupt_vector_55 : { KEEP (*(__interrupt_vector_55)) KEEP (*(__interrupt_vector_timer0_a1)) } > VECT55
__interrupt_vector_56 : { KEEP (*(__interrupt_vector_56)) KEEP (*(__interrupt_vector_timer0_a0)) } > VECT56
__interrupt_vector_57 : { KEEP (*(__interrupt_vector_57)) KEEP (*(__interrupt_vector_adc12)) } > VECT57
__interrupt_vector_58 : { KEEP (*(__interrupt_vector_58)) KEEP (*(__interrupt_vector_usci_b0)) } > VECT58
__interrupt_vector_59 : { KEEP (*(__interrupt_vector_59)) KEEP (*(__interrupt_vector_usci_a0)) } > VECT59
__interrupt_vector_60 : { KEEP (*(__interrupt_vector_60)) KEEP (*(__interrupt_vector_wdt)) } > VECT60
__interrupt_vector_61 : { KEEP (*(__interrupt_vector_61)) KEEP (*(__interrupt_vector_comp_b)) } > VECT61
__interrupt_vector_62 : { KEEP (*(__interrupt_vector_62)) KEEP (*(__interrupt_vector_unmi)) } > VECT62
__interrupt_vector_63 : { KEEP (*(__interrupt_vector_63)) KEEP (*(__interrupt_vector_sysnmi)) } > VECT63
__reset_vector :
{
KEEP (*(__interrupt_vector_64))
KEEP (*(__interrupt_vector_reset))
KEEP (*(.resetvec))
} > RESETVEC
.rodata :
{
. = ALIGN(2);
*(.plt)
*(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
*(.rodata1)
KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
} > ROM
/* Note: This is a separate .rodata section for sections which are
read only but which older linkers treat as read-write.
This prevents older linkers from marking the entire .rodata
section as read-write. */
.rodata2 :
{
. = ALIGN(2);
PROVIDE (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE (__preinit_array_end = .);
. = ALIGN(2);
PROVIDE (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE (__init_array_end = .);
. = ALIGN(2);
PROVIDE (__fini_array_start = .);
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
PROVIDE (__fini_array_end = .);
. = ALIGN(2);
*(.eh_frame_hdr)
KEEP (*(.eh_frame))
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from from the
crtend.o file until after the sorted ctors. The .ctor section
from the crtend file contains the end of ctors marker and it
must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} > ROM
.text :
{
. = ALIGN(2);
PROVIDE (_start = .);
KEEP (*(SORT(.crt_*)))
*(.lowtext .text .stub .text.* .gnu.linkonce.t.* .text:*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.interp .hash .dynsym .dynstr .gnu.version*)
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
. = ALIGN(2);
KEEP (*(.init))
KEEP (*(.fini))
KEEP (*(.tm_clone_table))
} > ROM
.data :
{
. = ALIGN(2);
PROVIDE (__datastart = .);
KEEP (*(.jcr))
*(.data.rel.ro.local) *(.data.rel.ro*)
*(.dynamic)
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
*(.data1)
*(.got.plt) *(.got)
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
. = ALIGN(2);
*(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
. = ALIGN(2);
_edata = .;
PROVIDE (edata = .);
PROVIDE (__dataend = .);
} > RAM AT>ROM
/* Note that crt0 assumes this is a multiple of two; all the
start/stop symbols are also assumed word-aligned. */
PROVIDE(__romdatastart = LOADADDR(.data));
PROVIDE (__romdatacopysize = SIZEOF(.data));
.bss :
{
. = ALIGN(2);
PROVIDE (__bssstart = .);
*(.dynbss)
*(.sbss .sbss.*)
*(.bss .bss.* .gnu.linkonce.b.*)
. = ALIGN(2);
*(COMMON)
PROVIDE (__bssend = .);
} > RAM
PROVIDE (__bsssize = SIZEOF(.bss));
/* This section contains data that is not initialised during load
or application reset. */
.noinit (NOLOAD) :
{
. = ALIGN(2);
PROVIDE (__noinit_start = .);
*(.noinit)
. = ALIGN(2);
PROVIDE (__noinit_end = .);
end = .;
} > RAM
/* We create this section so that "end" will always be in the
RAM region (matching .stack below), even if the .bss
section is empty. */
.heap (NOLOAD) :
{
. = ALIGN(2);
__heap_start__ = .;
_end = __heap_start__;
PROVIDE (end = .);
KEEP (*(.heap))
_end = .;
PROVIDE (end = .);
/* This word is here so that the section is not empty, and thus
not discarded by the linker. The actual value does not matter
and is ignored. */
LONG(0);
__heap_end__ = .;
__HeapLimit = __heap_end__;
} > RAM
/* WARNING: Do not place anything in RAM here.
The heap section must be the last section in RAM and the stack
section must be placed at the very end of the RAM region. */
.stack (ORIGIN (RAM) + LENGTH(RAM)) :
{
PROVIDE (__stack = .);
*(.stack)
}
.infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */
.infoB : {} > INFOB
.infoC : {} > INFOC
.infoD : {} > INFOD
.MSP430.attributes 0 :
{
KEEP (*(.MSP430.attributes))
KEEP (*(.gnu.attributes))
KEEP (*(__TI_build_attributes))
}
/* The rest are all not normally part of the runtime image. */
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/DISCARD/ : { *(.note.GNU-stack) }
}
/****************************************************************************/
/* Include peripherals memory map */
/****************************************************************************/
INCLUDE cc430f6137_symbols.ld

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/* ============================================================================ */
/* Copyright (c) 2019, Texas Instruments Incorporated */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* * Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* * Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* */
/* * Neither the name of Texas Instruments Incorporated nor the names of */
/* its contributors may be used to endorse or promote products derived */
/* from this software without specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ============================================================================ */
/* This file supports CC430F6137 devices. */
/* Version: 1.208 */
/************************************************************
* STANDARD BITS
************************************************************/
/************************************************************
* STATUS REGISTER BITS
************************************************************/
/************************************************************
* PERIPHERAL FILE MAP
************************************************************/
/************************************************************
* ADC12 PLUS
************************************************************/
PROVIDE(ADC12CTL0 = 0x0700);
PROVIDE(ADC12CTL0_L = 0x0700);
PROVIDE(ADC12CTL0_H = 0x0701);
PROVIDE(ADC12CTL1 = 0x0702);
PROVIDE(ADC12CTL1_L = 0x0702);
PROVIDE(ADC12CTL1_H = 0x0703);
PROVIDE(ADC12CTL2 = 0x0704);
PROVIDE(ADC12CTL2_L = 0x0704);
PROVIDE(ADC12CTL2_H = 0x0705);
PROVIDE(ADC12IFG = 0x070A);
PROVIDE(ADC12IFG_L = 0x070A);
PROVIDE(ADC12IFG_H = 0x070B);
PROVIDE(ADC12IE = 0x070C);
PROVIDE(ADC12IE_L = 0x070C);
PROVIDE(ADC12IE_H = 0x070D);
PROVIDE(ADC12IV = 0x070E);
PROVIDE(ADC12IV_L = 0x070E);
PROVIDE(ADC12IV_H = 0x070F);
PROVIDE(ADC12MEM0 = 0x0720);
PROVIDE(ADC12MEM0_L = 0x0720);
PROVIDE(ADC12MEM0_H = 0x0721);
PROVIDE(ADC12MEM1 = 0x0722);
PROVIDE(ADC12MEM1_L = 0x0722);
PROVIDE(ADC12MEM1_H = 0x0723);
PROVIDE(ADC12MEM2 = 0x0724);
PROVIDE(ADC12MEM2_L = 0x0724);
PROVIDE(ADC12MEM2_H = 0x0725);
PROVIDE(ADC12MEM3 = 0x0726);
PROVIDE(ADC12MEM3_L = 0x0726);
PROVIDE(ADC12MEM3_H = 0x0727);
PROVIDE(ADC12MEM4 = 0x0728);
PROVIDE(ADC12MEM4_L = 0x0728);
PROVIDE(ADC12MEM4_H = 0x0729);
PROVIDE(ADC12MEM5 = 0x072A);
PROVIDE(ADC12MEM5_L = 0x072A);
PROVIDE(ADC12MEM5_H = 0x072B);
PROVIDE(ADC12MEM6 = 0x072C);
PROVIDE(ADC12MEM6_L = 0x072C);
PROVIDE(ADC12MEM6_H = 0x072D);
PROVIDE(ADC12MEM7 = 0x072E);
PROVIDE(ADC12MEM7_L = 0x072E);
PROVIDE(ADC12MEM7_H = 0x072F);
PROVIDE(ADC12MEM8 = 0x0730);
PROVIDE(ADC12MEM8_L = 0x0730);
PROVIDE(ADC12MEM8_H = 0x0731);
PROVIDE(ADC12MEM9 = 0x0732);
PROVIDE(ADC12MEM9_L = 0x0732);
PROVIDE(ADC12MEM9_H = 0x0733);
PROVIDE(ADC12MEM10 = 0x0734);
PROVIDE(ADC12MEM10_L = 0x0734);
PROVIDE(ADC12MEM10_H = 0x0735);
PROVIDE(ADC12MEM11 = 0x0736);
PROVIDE(ADC12MEM11_L = 0x0736);
PROVIDE(ADC12MEM11_H = 0x0737);
PROVIDE(ADC12MEM12 = 0x0738);
PROVIDE(ADC12MEM12_L = 0x0738);
PROVIDE(ADC12MEM12_H = 0x0739);
PROVIDE(ADC12MEM13 = 0x073A);
PROVIDE(ADC12MEM13_L = 0x073A);
PROVIDE(ADC12MEM13_H = 0x073B);
PROVIDE(ADC12MEM14 = 0x073C);
PROVIDE(ADC12MEM14_L = 0x073C);
PROVIDE(ADC12MEM14_H = 0x073D);
PROVIDE(ADC12MEM15 = 0x073E);
PROVIDE(ADC12MEM15_L = 0x073E);
PROVIDE(ADC12MEM15_H = 0x073F);
PROVIDE(ADC12MCTL0 = 0x0710);
PROVIDE(ADC12MCTL1 = 0x0711);
PROVIDE(ADC12MCTL2 = 0x0712);
PROVIDE(ADC12MCTL3 = 0x0713);
PROVIDE(ADC12MCTL4 = 0x0714);
PROVIDE(ADC12MCTL5 = 0x0715);
PROVIDE(ADC12MCTL6 = 0x0716);
PROVIDE(ADC12MCTL7 = 0x0717);
PROVIDE(ADC12MCTL8 = 0x0718);
PROVIDE(ADC12MCTL9 = 0x0719);
PROVIDE(ADC12MCTL10 = 0x071A);
PROVIDE(ADC12MCTL11 = 0x071B);
PROVIDE(ADC12MCTL12 = 0x071C);
PROVIDE(ADC12MCTL13 = 0x071D);
PROVIDE(ADC12MCTL14 = 0x071E);
PROVIDE(ADC12MCTL15 = 0x071F);
/************************************************************
* AES Accelerator
************************************************************/
PROVIDE(AESACTL0 = 0x09C0);
PROVIDE(AESACTL0_L = 0x09C0);
PROVIDE(AESACTL0_H = 0x09C1);
PROVIDE(AESASTAT = 0x09C4);
PROVIDE(AESASTAT_L = 0x09C4);
PROVIDE(AESASTAT_H = 0x09C5);
PROVIDE(AESAKEY = 0x09C6);
PROVIDE(AESAKEY_L = 0x09C6);
PROVIDE(AESAKEY_H = 0x09C7);
PROVIDE(AESADIN = 0x09C8);
PROVIDE(AESADIN_L = 0x09C8);
PROVIDE(AESADIN_H = 0x09C9);
PROVIDE(AESADOUT = 0x09CA);
PROVIDE(AESADOUT_L = 0x09CA);
PROVIDE(AESADOUT_H = 0x09CB);
/************************************************************
* Comparator B
************************************************************/
PROVIDE(CBCTL0 = 0x08C0);
PROVIDE(CBCTL0_L = 0x08C0);
PROVIDE(CBCTL0_H = 0x08C1);
PROVIDE(CBCTL1 = 0x08C2);
PROVIDE(CBCTL1_L = 0x08C2);
PROVIDE(CBCTL1_H = 0x08C3);
PROVIDE(CBCTL2 = 0x08C4);
PROVIDE(CBCTL2_L = 0x08C4);
PROVIDE(CBCTL2_H = 0x08C5);
PROVIDE(CBCTL3 = 0x08C6);
PROVIDE(CBCTL3_L = 0x08C6);
PROVIDE(CBCTL3_H = 0x08C7);
PROVIDE(CBINT = 0x08CC);
PROVIDE(CBINT_L = 0x08CC);
PROVIDE(CBINT_H = 0x08CD);
PROVIDE(CBIV = 0x08CE);
/************************************************************
* CC1101 Radio Interface
************************************************************/
PROVIDE(RF1AIFCTL0 = 0x0F00);
PROVIDE(RF1AIFCTL0_L = 0x0F00);
PROVIDE(RF1AIFCTL0_H = 0x0F01);
PROVIDE(RF1AIFCTL1 = 0x0F02);
PROVIDE(RF1AIFCTL1_L = 0x0F02);
PROVIDE(RF1AIFCTL1_H = 0x0F03);
PROVIDE(RF1AIFCTL2 = 0x0F04);
PROVIDE(RF1AIFCTL2_L = 0x0F04);
PROVIDE(RF1AIFCTL2_H = 0x0F05);
PROVIDE(RF1AIFERR = 0x0F06);
PROVIDE(RF1AIFERR_L = 0x0F06);
PROVIDE(RF1AIFERR_H = 0x0F07);
PROVIDE(RF1AIFERRV = 0x0F0C);
PROVIDE(RF1AIFERRV_L = 0x0F0C);
PROVIDE(RF1AIFERRV_H = 0x0F0D);
PROVIDE(RF1AIFIV = 0x0F0E);
PROVIDE(RF1AIFIV_L = 0x0F0E);
PROVIDE(RF1AIFIV_H = 0x0F0F);
PROVIDE(RF1AINSTRW = 0x0F10);
PROVIDE(RF1AINSTRW_L = 0x0F10);
PROVIDE(RF1AINSTRW_H = 0x0F11);
PROVIDE(RF1AINSTR1W = 0x0F12);
PROVIDE(RF1AINSTR1W_L = 0x0F12);
PROVIDE(RF1AINSTR1W_H = 0x0F13);
PROVIDE(RF1AINSTR2W = 0x0F14);
PROVIDE(RF1AINSTR2W_L = 0x0F14);
PROVIDE(RF1AINSTR2W_H = 0x0F15);
PROVIDE(RF1ADINW = 0x0F16);
PROVIDE(RF1ADINW_L = 0x0F16);
PROVIDE(RF1ADINW_H = 0x0F17);
PROVIDE(RF1ASTAT0W = 0x0F20);
PROVIDE(RF1ASTAT0W_L = 0x0F20);
PROVIDE(RF1ASTAT0W_H = 0x0F21);
PROVIDE(RF1ASTAT1W = 0x0F22);
PROVIDE(RF1ASTAT1W_L = 0x0F22);
PROVIDE(RF1ASTAT1W_H = 0x0F23);
PROVIDE(RF1ASTAT2W = 0x0F24);
PROVIDE(RF1ASTAT2W_L = 0x0F24);
PROVIDE(RF1ASTAT2W_H = 0x0F25);
PROVIDE(RF1ADOUT0W = 0x0F28);
PROVIDE(RF1ADOUT0W_L = 0x0F28);
PROVIDE(RF1ADOUT0W_H = 0x0F29);
PROVIDE(RF1ADOUT1W = 0x0F2A);
PROVIDE(RF1ADOUT1W_L = 0x0F2A);
PROVIDE(RF1ADOUT1W_H = 0x0F2B);
PROVIDE(RF1ADOUT2W = 0x0F2C);
PROVIDE(RF1ADOUT2W_L = 0x0F2C);
PROVIDE(RF1ADOUT2W_H = 0x0F2D);
PROVIDE(RF1AIN = 0x0F30);
PROVIDE(RF1AIN_L = 0x0F30);
PROVIDE(RF1AIN_H = 0x0F31);
PROVIDE(RF1AIFG = 0x0F32);
PROVIDE(RF1AIFG_L = 0x0F32);
PROVIDE(RF1AIFG_H = 0x0F33);
PROVIDE(RF1AIES = 0x0F34);
PROVIDE(RF1AIES_L = 0x0F34);
PROVIDE(RF1AIES_H = 0x0F35);
PROVIDE(RF1AIE = 0x0F36);
PROVIDE(RF1AIE_L = 0x0F36);
PROVIDE(RF1AIE_H = 0x0F37);
PROVIDE(RF1AIV = 0x0F38);
PROVIDE(RF1AIV_L = 0x0F38);
PROVIDE(RF1AIV_H = 0x0F39);
PROVIDE(RF1ARXFIFO = 0x0F3C);
PROVIDE(RF1ARXFIFO_L = 0x0F3C);
PROVIDE(RF1ARXFIFO_H = 0x0F3D);
PROVIDE(RF1ATXFIFO = 0x0F3E);
PROVIDE(RF1ATXFIFO_L = 0x0F3E);
PROVIDE(RF1ATXFIFO_H = 0x0F3F);
/*************************************************************
* CRC Module
*************************************************************/
PROVIDE(CRCDI = 0x0150);
PROVIDE(CRCDI_L = 0x0150);
PROVIDE(CRCDI_H = 0x0151);
PROVIDE(CRCINIRES = 0x0154);
PROVIDE(CRCINIRES_L = 0x0154);
PROVIDE(CRCINIRES_H = 0x0155);
/************************************************************
* DMA_X
************************************************************/
PROVIDE(DMACTL0 = 0x0500);
PROVIDE(DMACTL1 = 0x0502);
PROVIDE(DMACTL2 = 0x0504);
PROVIDE(DMACTL3 = 0x0506);
PROVIDE(DMACTL4 = 0x0508);
PROVIDE(DMAIV = 0x050E);
PROVIDE(DMA0CTL = 0x0510);
PROVIDE(DMA0SA = 0x0512);
PROVIDE(DMA0SAL = 0x0512);
PROVIDE(DMA0DA = 0x0516);
PROVIDE(DMA0DAL = 0x0516);
PROVIDE(DMA0SZ = 0x051A);
PROVIDE(DMA1CTL = 0x0520);
PROVIDE(DMA1SA = 0x0522);
PROVIDE(DMA1SAL = 0x0522);
PROVIDE(DMA1DA = 0x0526);
PROVIDE(DMA1DAL = 0x0526);
PROVIDE(DMA1SZ = 0x052A);
PROVIDE(DMA2CTL = 0x0530);
PROVIDE(DMA2SA = 0x0532);
PROVIDE(DMA2SAL = 0x0532);
PROVIDE(DMA2DA = 0x0536);
PROVIDE(DMA2DAL = 0x0536);
PROVIDE(DMA2SZ = 0x053A);
/*************************************************************
* Flash Memory
*************************************************************/
PROVIDE(FCTL1 = 0x0140);
PROVIDE(FCTL1_L = 0x0140);
PROVIDE(FCTL1_H = 0x0141);
PROVIDE(FCTL3 = 0x0144);
PROVIDE(FCTL3_L = 0x0144);
PROVIDE(FCTL3_H = 0x0145);
PROVIDE(FCTL4 = 0x0146);
PROVIDE(FCTL4_L = 0x0146);
PROVIDE(FCTL4_H = 0x0147);
/************************************************************
* LCD_B
************************************************************/
PROVIDE(LCDBCTL0 = 0x0A00);
PROVIDE(LCDBCTL0_L = 0x0A00);
PROVIDE(LCDBCTL0_H = 0x0A01);
PROVIDE(LCDBCTL1 = 0x0A02);
PROVIDE(LCDBCTL1_L = 0x0A02);
PROVIDE(LCDBCTL1_H = 0x0A03);
PROVIDE(LCDBBLKCTL = 0x0A04);
PROVIDE(LCDBBLKCTL_L = 0x0A04);
PROVIDE(LCDBBLKCTL_H = 0x0A05);
PROVIDE(LCDBMEMCTL = 0x0A06);
PROVIDE(LCDBMEMCTL_L = 0x0A06);
PROVIDE(LCDBMEMCTL_H = 0x0A07);
PROVIDE(LCDBVCTL = 0x0A08);
PROVIDE(LCDBVCTL_L = 0x0A08);
PROVIDE(LCDBVCTL_H = 0x0A09);
PROVIDE(LCDBPCTL0 = 0x0A0A);
PROVIDE(LCDBPCTL0_L = 0x0A0A);
PROVIDE(LCDBPCTL0_H = 0x0A0B);
PROVIDE(LCDBPCTL1 = 0x0A0C);
PROVIDE(LCDBPCTL1_L = 0x0A0C);
PROVIDE(LCDBPCTL1_H = 0x0A0D);
PROVIDE(LCDBPCTL2 = 0x0A0E);
PROVIDE(LCDBPCTL2_L = 0x0A0E);
PROVIDE(LCDBPCTL2_H = 0x0A0F);
PROVIDE(LCDBPCTL3 = 0x0A10);
PROVIDE(LCDBPCTL3_L = 0x0A10);
PROVIDE(LCDBPCTL3_H = 0x0A11);
PROVIDE(LCDBCPCTL = 0x0A12);
PROVIDE(LCDBCPCTL_L = 0x0A12);
PROVIDE(LCDBCPCTL_H = 0x0A13);
PROVIDE(LCDBIV = 0x0A1E);
PROVIDE(LCDM1 = 0x0A20);
PROVIDE(LCDM2 = 0x0A21);
PROVIDE(LCDM3 = 0x0A22);
PROVIDE(LCDM4 = 0x0A23);
PROVIDE(LCDM5 = 0x0A24);
PROVIDE(LCDM6 = 0x0A25);
PROVIDE(LCDM7 = 0x0A26);
PROVIDE(LCDM8 = 0x0A27);
PROVIDE(LCDM9 = 0x0A28);
PROVIDE(LCDM10 = 0x0A29);
PROVIDE(LCDM11 = 0x0A2A);
PROVIDE(LCDM12 = 0x0A2B);
PROVIDE(LCDM13 = 0x0A2C);
PROVIDE(LCDM14 = 0x0A2D);
PROVIDE(LCDM15 = 0x0A2E);
PROVIDE(LCDM16 = 0x0A2F);
PROVIDE(LCDM17 = 0x0A30);
PROVIDE(LCDM18 = 0x0A31);
PROVIDE(LCDM19 = 0x0A32);
PROVIDE(LCDM20 = 0x0A33);
PROVIDE(LCDM21 = 0x0A34);
PROVIDE(LCDM22 = 0x0A35);
PROVIDE(LCDM23 = 0x0A36);
PROVIDE(LCDM24 = 0x0A37);
PROVIDE(LCDBM1 = 0x0A40);
PROVIDE(LCDBM2 = 0x0A41);
PROVIDE(LCDBM3 = 0x0A42);
PROVIDE(LCDBM4 = 0x0A43);
PROVIDE(LCDBM5 = 0x0A44);
PROVIDE(LCDBM6 = 0x0A45);
PROVIDE(LCDBM7 = 0x0A46);
PROVIDE(LCDBM8 = 0x0A47);
PROVIDE(LCDBM9 = 0x0A48);
PROVIDE(LCDBM10 = 0x0A49);
PROVIDE(LCDBM11 = 0x0A4A);
PROVIDE(LCDBM12 = 0x0A4B);
PROVIDE(LCDBM13 = 0x0A4C);
PROVIDE(LCDBM14 = 0x0A4D);
PROVIDE(LCDBM15 = 0x0A4E);
PROVIDE(LCDBM16 = 0x0A4F);
PROVIDE(LCDBM17 = 0x0A50);
PROVIDE(LCDBM18 = 0x0A51);
PROVIDE(LCDBM19 = 0x0A52);
PROVIDE(LCDBM20 = 0x0A53);
PROVIDE(LCDBM21 = 0x0A54);
PROVIDE(LCDBM22 = 0x0A55);
PROVIDE(LCDBM23 = 0x0A56);
PROVIDE(LCDBM24 = 0x0A57);
/************************************************************
* HARDWARE MULTIPLIER 32Bit
************************************************************/
PROVIDE(MPY = 0x04C0);
PROVIDE(MPY_L = 0x04C0);
PROVIDE(MPY_H = 0x04C1);
PROVIDE(MPYS = 0x04C2);
PROVIDE(MPYS_L = 0x04C2);
PROVIDE(MPYS_H = 0x04C3);
PROVIDE(MAC = 0x04C4);
PROVIDE(MAC_L = 0x04C4);
PROVIDE(MAC_H = 0x04C5);
PROVIDE(MACS = 0x04C6);
PROVIDE(MACS_L = 0x04C6);
PROVIDE(MACS_H = 0x04C7);
PROVIDE(OP2 = 0x04C8);
PROVIDE(OP2_L = 0x04C8);
PROVIDE(OP2_H = 0x04C9);
PROVIDE(RESLO = 0x04CA);
PROVIDE(RESLO_L = 0x04CA);
PROVIDE(RESLO_H = 0x04CB);
PROVIDE(RESHI = 0x04CC);
PROVIDE(RESHI_L = 0x04CC);
PROVIDE(RESHI_H = 0x04CD);
PROVIDE(SUMEXT = 0x04CE);
PROVIDE(SUMEXT_L = 0x04CE);
PROVIDE(SUMEXT_H = 0x04CF);
PROVIDE(MPY32L = 0x04D0);
PROVIDE(MPY32L_L = 0x04D0);
PROVIDE(MPY32L_H = 0x04D1);
PROVIDE(MPY32H = 0x04D2);
PROVIDE(MPY32H_L = 0x04D2);
PROVIDE(MPY32H_H = 0x04D3);
PROVIDE(MPYS32L = 0x04D4);
PROVIDE(MPYS32L_L = 0x04D4);
PROVIDE(MPYS32L_H = 0x04D5);
PROVIDE(MPYS32H = 0x04D6);
PROVIDE(MPYS32H_L = 0x04D6);
PROVIDE(MPYS32H_H = 0x04D7);
PROVIDE(MAC32L = 0x04D8);
PROVIDE(MAC32L_L = 0x04D8);
PROVIDE(MAC32L_H = 0x04D9);
PROVIDE(MAC32H = 0x04DA);
PROVIDE(MAC32H_L = 0x04DA);
PROVIDE(MAC32H_H = 0x04DB);
PROVIDE(MACS32L = 0x04DC);
PROVIDE(MACS32L_L = 0x04DC);
PROVIDE(MACS32L_H = 0x04DD);
PROVIDE(MACS32H = 0x04DE);
PROVIDE(MACS32H_L = 0x04DE);
PROVIDE(MACS32H_H = 0x04DF);
PROVIDE(OP2L = 0x04E0);
PROVIDE(OP2L_L = 0x04E0);
PROVIDE(OP2L_H = 0x04E1);
PROVIDE(OP2H = 0x04E2);
PROVIDE(OP2H_L = 0x04E2);
PROVIDE(OP2H_H = 0x04E3);
PROVIDE(RES0 = 0x04E4);
PROVIDE(RES0_L = 0x04E4);
PROVIDE(RES0_H = 0x04E5);
PROVIDE(RES1 = 0x04E6);
PROVIDE(RES1_L = 0x04E6);
PROVIDE(RES1_H = 0x04E7);
PROVIDE(RES2 = 0x04E8);
PROVIDE(RES2_L = 0x04E8);
PROVIDE(RES2_H = 0x04E9);
PROVIDE(RES3 = 0x04EA);
PROVIDE(RES3_L = 0x04EA);
PROVIDE(RES3_H = 0x04EB);
PROVIDE(MPY32CTL0 = 0x04EC);
PROVIDE(MPY32CTL0_L = 0x04EC);
PROVIDE(MPY32CTL0_H = 0x04ED);
/************************************************************
* DIGITAL I/O Port1/2 Pull up / Pull down Resistors
************************************************************/
PROVIDE(PAIN = 0x0200);
PROVIDE(PAIN_L = 0x0200);
PROVIDE(PAIN_H = 0x0201);
PROVIDE(PAOUT = 0x0202);
PROVIDE(PAOUT_L = 0x0202);
PROVIDE(PAOUT_H = 0x0203);
PROVIDE(PADIR = 0x0204);
PROVIDE(PADIR_L = 0x0204);
PROVIDE(PADIR_H = 0x0205);
PROVIDE(PAREN = 0x0206);
PROVIDE(PAREN_L = 0x0206);
PROVIDE(PAREN_H = 0x0207);
PROVIDE(PADS = 0x0208);
PROVIDE(PADS_L = 0x0208);
PROVIDE(PADS_H = 0x0209);
PROVIDE(PASEL = 0x020A);
PROVIDE(PASEL_L = 0x020A);
PROVIDE(PASEL_H = 0x020B);
PROVIDE(PAIES = 0x0218);
PROVIDE(PAIES_L = 0x0218);
PROVIDE(PAIES_H = 0x0219);
PROVIDE(PAIE = 0x021A);
PROVIDE(PAIE_L = 0x021A);
PROVIDE(PAIE_H = 0x021B);
PROVIDE(PAIFG = 0x021C);
PROVIDE(PAIFG_L = 0x021C);
PROVIDE(PAIFG_H = 0x021D);
PROVIDE(P1IV = 0x020E);
PROVIDE(P2IV = 0x021E);
/************************************************************
* DIGITAL I/O Port3/4 Pull up / Pull down Resistors
************************************************************/
PROVIDE(PBIN = 0x0220);
PROVIDE(PBIN_L = 0x0220);
PROVIDE(PBIN_H = 0x0221);
PROVIDE(PBOUT = 0x0222);
PROVIDE(PBOUT_L = 0x0222);
PROVIDE(PBOUT_H = 0x0223);
PROVIDE(PBDIR = 0x0224);
PROVIDE(PBDIR_L = 0x0224);
PROVIDE(PBDIR_H = 0x0225);
PROVIDE(PBREN = 0x0226);
PROVIDE(PBREN_L = 0x0226);
PROVIDE(PBREN_H = 0x0227);
PROVIDE(PBDS = 0x0228);
PROVIDE(PBDS_L = 0x0228);
PROVIDE(PBDS_H = 0x0229);
PROVIDE(PBSEL = 0x022A);
PROVIDE(PBSEL_L = 0x022A);
PROVIDE(PBSEL_H = 0x022B);
/************************************************************
* DIGITAL I/O Port5 Pull up / Pull down Resistors
************************************************************/
PROVIDE(PCIN = 0x0240);
PROVIDE(PCIN_L = 0x0240);
PROVIDE(PCIN_H = 0x0241);
PROVIDE(PCOUT = 0x0242);
PROVIDE(PCOUT_L = 0x0242);
PROVIDE(PCOUT_H = 0x0243);
PROVIDE(PCDIR = 0x0244);
PROVIDE(PCDIR_L = 0x0244);
PROVIDE(PCDIR_H = 0x0245);
PROVIDE(PCREN = 0x0246);
PROVIDE(PCREN_L = 0x0246);
PROVIDE(PCREN_H = 0x0247);
PROVIDE(PCDS = 0x0248);
PROVIDE(PCDS_L = 0x0248);
PROVIDE(PCDS_H = 0x0249);
PROVIDE(PCSEL = 0x024A);
PROVIDE(PCSEL_L = 0x024A);
PROVIDE(PCSEL_H = 0x024B);
/************************************************************
* DIGITAL I/O PortJ Pull up / Pull down Resistors
************************************************************/
PROVIDE(PJIN = 0x0320);
PROVIDE(PJIN_L = 0x0320);
PROVIDE(PJIN_H = 0x0321);
PROVIDE(PJOUT = 0x0322);
PROVIDE(PJOUT_L = 0x0322);
PROVIDE(PJOUT_H = 0x0323);
PROVIDE(PJDIR = 0x0324);
PROVIDE(PJDIR_L = 0x0324);
PROVIDE(PJDIR_H = 0x0325);
PROVIDE(PJREN = 0x0326);
PROVIDE(PJREN_L = 0x0326);
PROVIDE(PJREN_H = 0x0327);
PROVIDE(PJDS = 0x0328);
PROVIDE(PJDS_L = 0x0328);
PROVIDE(PJDS_H = 0x0329);
/************************************************************
* PORT MAPPING CONTROLLER
************************************************************/
PROVIDE(PMAPKEYID = 0x01C0);
PROVIDE(PMAPKEYID_L = 0x01C0);
PROVIDE(PMAPKEYID_H = 0x01C1);
PROVIDE(PMAPCTL = 0x01C2);
PROVIDE(PMAPCTL_L = 0x01C2);
PROVIDE(PMAPCTL_H = 0x01C3);
/************************************************************
* PORT 1 MAPPING CONTROLLER
************************************************************/
PROVIDE(P1MAP01 = 0x01C8);
PROVIDE(P1MAP01_L = 0x01C8);
PROVIDE(P1MAP01_H = 0x01C9);
PROVIDE(P1MAP23 = 0x01CA);
PROVIDE(P1MAP23_L = 0x01CA);
PROVIDE(P1MAP23_H = 0x01CB);
PROVIDE(P1MAP45 = 0x01CC);
PROVIDE(P1MAP45_L = 0x01CC);
PROVIDE(P1MAP45_H = 0x01CD);
PROVIDE(P1MAP67 = 0x01CE);
PROVIDE(P1MAP67_L = 0x01CE);
PROVIDE(P1MAP67_H = 0x01CF);
/************************************************************
* PORT 2 MAPPING CONTROLLER
************************************************************/
PROVIDE(P2MAP01 = 0x01D0);
PROVIDE(P2MAP01_L = 0x01D0);
PROVIDE(P2MAP01_H = 0x01D1);
PROVIDE(P2MAP23 = 0x01D2);
PROVIDE(P2MAP23_L = 0x01D2);
PROVIDE(P2MAP23_H = 0x01D3);
PROVIDE(P2MAP45 = 0x01D4);
PROVIDE(P2MAP45_L = 0x01D4);
PROVIDE(P2MAP45_H = 0x01D5);
PROVIDE(P2MAP67 = 0x01D6);
PROVIDE(P2MAP67_L = 0x01D6);
PROVIDE(P2MAP67_H = 0x01D7);
/************************************************************
* PORT 3 MAPPING CONTROLLER
************************************************************/
PROVIDE(P3MAP01 = 0x01D8);
PROVIDE(P3MAP01_L = 0x01D8);
PROVIDE(P3MAP01_H = 0x01D9);
PROVIDE(P3MAP23 = 0x01DA);
PROVIDE(P3MAP23_L = 0x01DA);
PROVIDE(P3MAP23_H = 0x01DB);
PROVIDE(P3MAP45 = 0x01DC);
PROVIDE(P3MAP45_L = 0x01DC);
PROVIDE(P3MAP45_H = 0x01DD);
PROVIDE(P3MAP67 = 0x01DE);
PROVIDE(P3MAP67_L = 0x01DE);
PROVIDE(P3MAP67_H = 0x01DF);
/************************************************************
* PMM - Power Management System
************************************************************/
PROVIDE(PMMCTL0 = 0x0120);
PROVIDE(PMMCTL0_L = 0x0120);
PROVIDE(PMMCTL0_H = 0x0121);
PROVIDE(PMMCTL1 = 0x0122);
PROVIDE(PMMCTL1_L = 0x0122);
PROVIDE(PMMCTL1_H = 0x0123);
PROVIDE(SVSMHCTL = 0x0124);
PROVIDE(SVSMHCTL_L = 0x0124);
PROVIDE(SVSMHCTL_H = 0x0125);
PROVIDE(SVSMLCTL = 0x0126);
PROVIDE(SVSMLCTL_L = 0x0126);
PROVIDE(SVSMLCTL_H = 0x0127);
PROVIDE(SVSMIO = 0x0128);
PROVIDE(SVSMIO_L = 0x0128);
PROVIDE(SVSMIO_H = 0x0129);
PROVIDE(PMMIFG = 0x012C);
PROVIDE(PMMIFG_L = 0x012C);
PROVIDE(PMMIFG_H = 0x012D);
PROVIDE(PMMRIE = 0x012E);
PROVIDE(PMMRIE_L = 0x012E);
PROVIDE(PMMRIE_H = 0x012F);
/*************************************************************
* RAM Control Module
*************************************************************/
PROVIDE(RCCTL0 = 0x0158);
PROVIDE(RCCTL0_L = 0x0158);
PROVIDE(RCCTL0_H = 0x0159);
/************************************************************
* Shared Reference
************************************************************/
PROVIDE(REFCTL0 = 0x01B0);
PROVIDE(REFCTL0_L = 0x01B0);
PROVIDE(REFCTL0_H = 0x01B1);
/************************************************************
* Real Time Clock
************************************************************/
PROVIDE(RTCCTL01 = 0x04A0);
PROVIDE(RTCCTL01_L = 0x04A0);
PROVIDE(RTCCTL01_H = 0x04A1);
PROVIDE(RTCCTL23 = 0x04A2);
PROVIDE(RTCCTL23_L = 0x04A2);
PROVIDE(RTCCTL23_H = 0x04A3);
PROVIDE(RTCPS0CTL = 0x04A8);
PROVIDE(RTCPS0CTL_L = 0x04A8);
PROVIDE(RTCPS0CTL_H = 0x04A9);
PROVIDE(RTCPS1CTL = 0x04AA);
PROVIDE(RTCPS1CTL_L = 0x04AA);
PROVIDE(RTCPS1CTL_H = 0x04AB);
PROVIDE(RTCPS = 0x04AC);
PROVIDE(RTCPS_L = 0x04AC);
PROVIDE(RTCPS_H = 0x04AD);
PROVIDE(RTCIV = 0x04AE);
PROVIDE(RTCTIM0 = 0x04B0);
PROVIDE(RTCTIM0_L = 0x04B0);
PROVIDE(RTCTIM0_H = 0x04B1);
PROVIDE(RTCTIM1 = 0x04B2);
PROVIDE(RTCTIM1_L = 0x04B2);
PROVIDE(RTCTIM1_H = 0x04B3);
PROVIDE(RTCDATE = 0x04B4);
PROVIDE(RTCDATE_L = 0x04B4);
PROVIDE(RTCDATE_H = 0x04B5);
PROVIDE(RTCYEAR = 0x04B6);
PROVIDE(RTCYEAR_L = 0x04B6);
PROVIDE(RTCYEAR_H = 0x04B7);
PROVIDE(RTCAMINHR = 0x04B8);
PROVIDE(RTCAMINHR_L = 0x04B8);
PROVIDE(RTCAMINHR_H = 0x04B9);
PROVIDE(RTCADOWDAY = 0x04BA);
PROVIDE(RTCADOWDAY_L = 0x04BA);
PROVIDE(RTCADOWDAY_H = 0x04BB);
/************************************************************
* SFR - Special Function Register Module
************************************************************/
PROVIDE(SFRIE1 = 0x0100);
PROVIDE(SFRIE1_L = 0x0100);
PROVIDE(SFRIE1_H = 0x0101);
PROVIDE(SFRIFG1 = 0x0102);
PROVIDE(SFRIFG1_L = 0x0102);
PROVIDE(SFRIFG1_H = 0x0103);
PROVIDE(SFRRPCR = 0x0104);
PROVIDE(SFRRPCR_L = 0x0104);
PROVIDE(SFRRPCR_H = 0x0105);
/************************************************************
* SYS - System Module
************************************************************/
PROVIDE(SYSCTL = 0x0180);
PROVIDE(SYSCTL_L = 0x0180);
PROVIDE(SYSCTL_H = 0x0181);
PROVIDE(SYSBSLC = 0x0182);
PROVIDE(SYSBSLC_L = 0x0182);
PROVIDE(SYSBSLC_H = 0x0183);
PROVIDE(SYSJMBC = 0x0186);
PROVIDE(SYSJMBC_L = 0x0186);
PROVIDE(SYSJMBC_H = 0x0187);
PROVIDE(SYSJMBI0 = 0x0188);
PROVIDE(SYSJMBI0_L = 0x0188);
PROVIDE(SYSJMBI0_H = 0x0189);
PROVIDE(SYSJMBI1 = 0x018A);
PROVIDE(SYSJMBI1_L = 0x018A);
PROVIDE(SYSJMBI1_H = 0x018B);
PROVIDE(SYSJMBO0 = 0x018C);
PROVIDE(SYSJMBO0_L = 0x018C);
PROVIDE(SYSJMBO0_H = 0x018D);
PROVIDE(SYSJMBO1 = 0x018E);
PROVIDE(SYSJMBO1_L = 0x018E);
PROVIDE(SYSJMBO1_H = 0x018F);
PROVIDE(SYSBERRIV = 0x0198);
PROVIDE(SYSBERRIV_L = 0x0198);
PROVIDE(SYSBERRIV_H = 0x0199);
PROVIDE(SYSUNIV = 0x019A);
PROVIDE(SYSUNIV_L = 0x019A);
PROVIDE(SYSUNIV_H = 0x019B);
PROVIDE(SYSSNIV = 0x019C);
PROVIDE(SYSSNIV_L = 0x019C);
PROVIDE(SYSSNIV_H = 0x019D);
PROVIDE(SYSRSTIV = 0x019E);
PROVIDE(SYSRSTIV_L = 0x019E);
PROVIDE(SYSRSTIV_H = 0x019F);
/************************************************************
* Timer0_A5
************************************************************/
PROVIDE(TA0CTL = 0x0340);
PROVIDE(TA0CCTL0 = 0x0342);
PROVIDE(TA0CCTL1 = 0x0344);
PROVIDE(TA0CCTL2 = 0x0346);
PROVIDE(TA0CCTL3 = 0x0348);
PROVIDE(TA0CCTL4 = 0x034A);
PROVIDE(TA0R = 0x0350);
PROVIDE(TA0CCR0 = 0x0352);
PROVIDE(TA0CCR1 = 0x0354);
PROVIDE(TA0CCR2 = 0x0356);
PROVIDE(TA0CCR3 = 0x0358);
PROVIDE(TA0CCR4 = 0x035A);
PROVIDE(TA0IV = 0x036E);
PROVIDE(TA0EX0 = 0x0360);
/************************************************************
* Timer1_A3
************************************************************/
PROVIDE(TA1CTL = 0x0380);
PROVIDE(TA1CCTL0 = 0x0382);
PROVIDE(TA1CCTL1 = 0x0384);
PROVIDE(TA1CCTL2 = 0x0386);
PROVIDE(TA1R = 0x0390);
PROVIDE(TA1CCR0 = 0x0392);
PROVIDE(TA1CCR1 = 0x0394);
PROVIDE(TA1CCR2 = 0x0396);
PROVIDE(TA1IV = 0x03AE);
PROVIDE(TA1EX0 = 0x03A0);
/************************************************************
* UNIFIED CLOCK SYSTEM FOR Radio Devices
************************************************************/
PROVIDE(UCSCTL0 = 0x0160);
PROVIDE(UCSCTL0_L = 0x0160);
PROVIDE(UCSCTL0_H = 0x0161);
PROVIDE(UCSCTL1 = 0x0162);
PROVIDE(UCSCTL1_L = 0x0162);
PROVIDE(UCSCTL1_H = 0x0163);
PROVIDE(UCSCTL2 = 0x0164);
PROVIDE(UCSCTL2_L = 0x0164);
PROVIDE(UCSCTL2_H = 0x0165);
PROVIDE(UCSCTL3 = 0x0166);
PROVIDE(UCSCTL3_L = 0x0166);
PROVIDE(UCSCTL3_H = 0x0167);
PROVIDE(UCSCTL4 = 0x0168);
PROVIDE(UCSCTL4_L = 0x0168);
PROVIDE(UCSCTL4_H = 0x0169);
PROVIDE(UCSCTL5 = 0x016A);
PROVIDE(UCSCTL5_L = 0x016A);
PROVIDE(UCSCTL5_H = 0x016B);
PROVIDE(UCSCTL6 = 0x016C);
PROVIDE(UCSCTL6_L = 0x016C);
PROVIDE(UCSCTL6_H = 0x016D);
PROVIDE(UCSCTL7 = 0x016E);
PROVIDE(UCSCTL7_L = 0x016E);
PROVIDE(UCSCTL7_H = 0x016F);
PROVIDE(UCSCTL8 = 0x0170);
PROVIDE(UCSCTL8_L = 0x0170);
PROVIDE(UCSCTL8_H = 0x0171);
/************************************************************
* USCI A0
************************************************************/
PROVIDE(UCA0CTLW0 = 0x05C0);
PROVIDE(UCA0CTLW0_L = 0x05C0);
PROVIDE(UCA0CTLW0_H = 0x05C1);
PROVIDE(UCA0BRW = 0x05C6);
PROVIDE(UCA0BRW_L = 0x05C6);
PROVIDE(UCA0BRW_H = 0x05C7);
PROVIDE(UCA0MCTL = 0x05C8);
PROVIDE(UCA0STAT = 0x05CA);
PROVIDE(UCA0RXBUF = 0x05CC);
PROVIDE(UCA0TXBUF = 0x05CE);
PROVIDE(UCA0ABCTL = 0x05D0);
PROVIDE(UCA0IRCTL = 0x05D2);
PROVIDE(UCA0IRCTL_L = 0x05D2);
PROVIDE(UCA0IRCTL_H = 0x05D3);
PROVIDE(UCA0ICTL = 0x05DC);
PROVIDE(UCA0ICTL_L = 0x05DC);
PROVIDE(UCA0ICTL_H = 0x05DD);
PROVIDE(UCA0IV = 0x05DE);
/************************************************************
* USCI B0
************************************************************/
PROVIDE(UCB0CTLW0 = 0x05E0);
PROVIDE(UCB0CTLW0_L = 0x05E0);
PROVIDE(UCB0CTLW0_H = 0x05E1);
PROVIDE(UCB0BRW = 0x05E6);
PROVIDE(UCB0BRW_L = 0x05E6);
PROVIDE(UCB0BRW_H = 0x05E7);
PROVIDE(UCB0STAT = 0x05EA);
PROVIDE(UCB0RXBUF = 0x05EC);
PROVIDE(UCB0TXBUF = 0x05EE);
PROVIDE(UCB0I2COA = 0x05F0);
PROVIDE(UCB0I2COA_L = 0x05F0);
PROVIDE(UCB0I2COA_H = 0x05F1);
PROVIDE(UCB0I2CSA = 0x05F2);
PROVIDE(UCB0I2CSA_L = 0x05F2);
PROVIDE(UCB0I2CSA_H = 0x05F3);
PROVIDE(UCB0ICTL = 0x05FC);
PROVIDE(UCB0ICTL_L = 0x05FC);
PROVIDE(UCB0ICTL_H = 0x05FD);
PROVIDE(UCB0IV = 0x05FE);
/************************************************************
* WATCHDOG TIMER A
************************************************************/
PROVIDE(WDTCTL = 0x015C);
PROVIDE(WDTCTL_L = 0x015C);
PROVIDE(WDTCTL_H = 0x015D);
/************************************************************
* TLV Descriptors
************************************************************/
/************************************************************
* Interrupt Vectors (offset from 0xFF80)
************************************************************/
/************************************************************
* End of Modules
************************************************************/

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cpu/msp430_common/vendor/msp430-gcc-support-files/include/devices.csv vendored Normal file
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@ -0,0 +1,689 @@
# /* ============================================================================ */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* Copyright (c) 2016, Texas Instruments Incorporated */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* All rights reserved. */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* Redistribution and use in source and binary forms, with or without */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* modification, are permitted provided that the following conditions */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* are met: */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* * Redistributions of source code must retain the above copyright */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* notice, this list of conditions and the following disclaimer. */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* * Redistributions in binary form must reproduce the above copyright */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* notice, this list of conditions and the following disclaimer in the */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* documentation and/or other materials provided with the distribution. */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* * Neither the name of Texas Instruments Incorporated nor the names of */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* its contributors may be used to endorse or promote products derived */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* from this software without specific prior written permission. */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
"# /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ""AS IS"" */",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# /* ============================================================================ */,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
Version:,1.208,,,,Date:,08/21/19,15:53:27,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# ============================================================================,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# CPU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# 0 STD MSP430 CPU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# 1 MSP430X CPU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# 2 MSP430XV2 CPU,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# HWMPY,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# 0 No Hardware Multiplier,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# 1 16 Bit Hardware Multiplier,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# 2 16 Bit Hardware Multiplier with sign Extension (2xx Devices),,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# 4 32 Bit Hardware Multiplier,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# 8 32 Bit Hardware Multiplier (5xx),,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
#,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# SPI2Wire,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# 0 JTAG only - no scan,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# 1 SBW (default) - scan allowed,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# 2 JTAG (Default) - scan allowed,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# 3 SBW only - no scan,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# ============================================================================,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
# Device Name,CPU_TYPE,CPU_Bugs,MPY_TYPE,SBW,EEM,BREAKPOINTS,CLOCKCONTROL,CYCLECOUNTER,STACKSIZE,RAMStart,RAMEnd,RAMStart2,RAMEnd2,TINYRAMStart,TINYRAMEnd,USBRAMStart,USBRAMEnd,LEARAMStart,LEARAMEnd,MirrowedRAMSource,MirrowedRAMStart,MirrowedRAMEnd,BSLStart,BSLSize,BSLEnd,INFOStart,INFOSize,INFOEnd,INFOA,INFOB,INFOC,INFOD,FStart,FEnd,FStart2,FEnd2,Signature_Start,Signature_Size,INTStart,INTEnd
msp430c111,0,0,0,0,NONE,0,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F800,FFDF,0,0,,,FFE0,FFFF
msp430c1111,0,0,0,0,NONE,0,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F800,FFDF,0,0,,,FFE0,FFFF
msp430c112,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF
msp430c1121,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF
msp430c1331,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF
msp430c1351,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430c311s,0,0,0,0,NONE,0,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F800,FFDF,0,0,,,FFE0,FFFF
msp430c312,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF
msp430c313,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF
msp430c314,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,D000,FFDF,0,0,,,FFE0,FFFF
msp430c315,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430c323,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF
msp430c325,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430c336,0,0,1,0,NONE,0,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,A000,FFDF,0,0,,,FFE0,FFFF
msp430c337,0,0,1,0,NONE,0,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430c412,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF
msp430c413,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF
msp430cg4616,1,CPU16,1,0,NONE,0,NONE,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBF,10000,18FFF,,,FFC0,FFFF
msp430cg4617,1,CPU16,1,0,NONE,0,NONE,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBF,10000,19FFF,,,FFC0,FFFF
msp430cg4618,1,CPU16,1,0,NONE,0,NONE,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBF,10000,1FFFF,,,FFC0,FFFF
msp430cg4619,1,CPU16,1,0,NONE,0,NONE,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBF,10000,1FFFF,,,FFC0,FFFF
msp430e112,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF
msp430e313,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF
msp430e315,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430e325,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430e337,0,0,1,0,NONE,0,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430f110,0,0,0,0,EMEX_LOW,2,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1080,80,10FF,1080,0,0,0,FC00,FFDF,0,0,,,FFE0,FFFF
msp430f1101,0,0,0,0,EMEX_LOW,2,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1080,80,10FF,1080,0,0,0,FC00,FFDF,0,0,,,FFE0,FFFF
msp430f1101a,0,0,0,0,EMEX_LOW,2,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1080,80,10FF,1080,0,0,0,FC00,FFDF,0,0,,,FFE0,FFFF
msp430f1111,0,0,0,0,EMEX_LOW,2,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F800,FFDF,0,0,,,FFE0,FFFF
msp430f1111a,0,0,0,0,EMEX_LOW,2,NONE,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F800,FFDF,0,0,,,FFE0,FFFF
msp430f112,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF
msp430f1121,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF
msp430f1121a,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF
msp430f1122,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF
msp430f1132,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF
msp430f122,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF
msp430f1222,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFDF,0,0,,,FFE0,FFFF
msp430f123,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF
msp430f1232,0,0,0,0,EMEX_LOW,2,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF
msp430f133,0,0,0,0,EMEX_MEDIUM,3,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF
msp430f135,0,0,0,0,EMEX_MEDIUM,3,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430f147,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430f148,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF
msp430f149,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF
msp430f1471,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430f1481,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF
msp430f1491,0,0,1,0,EMEX_MEDIUM,3,NONE,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF
msp430f155,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430f156,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,A000,FFDF,0,0,,,FFE0,FFFF
msp430f157,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430f167,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430f168,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF
msp430f169,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF
msp430f1610,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,24FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430f1611,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,38FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF
msp430f1612,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,24FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2500,FFDF,0,0,,,FFE0,FFFF
msp430f2001,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF
msp430f2011,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF
msp430f2002,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF
msp430f2012,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF
msp430f2003,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF
msp430f2013,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF
msp430f2101,0,CPU19,0,0,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f2111,0,CPU19,0,0,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f2121,0,CPU19,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f2131,0,CPU19,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f2112,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f2122,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f2132,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f2232,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f2252,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f2272,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f2234,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f2254,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f2274,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f2330,0,0,2,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f2350,0,0,2,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f2370,0,0,2,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f233,0,0,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f235,0,0,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430f247,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFBF,0,0,FFDE,2,FFC0,FFFF
msp430f248,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFBF,0,0,FFDE,2,FFC0,FFFF
msp430f249,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFBF,0,0,FFDE,2,FFC0,FFFF
msp430f2410,0,CPU19,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBF,0,0,FFDE,2,FFC0,FFFF
msp430f2471,0,0,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFBF,0,0,FFDE,2,FFC0,FFFF
msp430f2481,0,0,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFBF,0,0,FFDE,2,FFC0,FFFF
msp430f2491,0,0,2,0,EMEX_MEDIUM,3,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFBF,0,0,FFDE,2,FFC0,FFFF
msp430f2416,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
msp430f2417,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
msp430f2418,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
msp430f2419,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
msp430f2616,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
msp430f2617,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
msp430f2618,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
msp430f2619,1,CPU16,2,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
msp430f412,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,F000,FFBD,0,0,,,FFE0,FFFF
msp430f413,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF
msp430f415,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430f417,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430f4132,0,CPU19,0,1,EMEX_LOW,2,EXTENDED,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDF,0,0,,,FFE0,FFFF
msp430f4152,0,CPU19,0,1,EMEX_LOW,2,EXTENDED,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDF,0,0,,,FFE0,FFFF
msp430f423,0,0,1,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF
msp430f425,0,0,1,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430f427,0,0,1,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430f423a,0,0,1,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF
msp430f425a,0,0,1,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430f427a,0,0,1,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430f435,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430f436,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,A000,FFDF,0,0,,,FFE0,FFFF
msp430f437,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430f4351,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430f4361,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,A000,FFDF,0,0,,,FFE0,FFFF
msp430f4371,0,0,0,0,EMEX_HIGH,8,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430f4481,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF
msp430f4491,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF
msp430f447,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430f448,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF
msp430f449,0,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF
msp430fe423,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF
msp430fe425,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430fe427,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430fe423a,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF
msp430fe425a,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430fe427a,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430fe4232,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF
msp430fe4242,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,D000,FFDF,0,0,,,FFE0,FFFF
msp430fe4252,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430fe4272,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430f4783,0,0,4,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFDF,0,0,,,FFE0,FFFF
msp430f4793,0,0,4,0,EMEX_LOW,2,STANDARD,0,80,200,0BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFDF,0,0,,,FFE0,FFFF
msp430f4784,0,CPU19,4,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFDF,0,0,,,FFE0,FFFF
msp430f4794,0,CPU19,4,0,EMEX_LOW,2,STANDARD,0,80,200,0BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFDF,0,0,,,FFE0,FFFF
msp430f47126,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,0,0,FFBE,2,FFC0,FFFF
msp430f47127,1,CPU19,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,0,0,FFBE,2,FFC0,FFFF
msp430f47163,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
msp430f47173,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
msp430f47183,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
msp430f47193,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
msp430f47166,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
msp430f47176,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
msp430f47186,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
msp430f47196,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
msp430f47167,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
msp430f47177,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
msp430f47187,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
msp430f47197,1,0,4,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
msp430f4250,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430f4260,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,A000,FFDF,0,0,,,FFE0,FFFF
msp430f4270,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430fg4250,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430fg4260,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,A000,FFDF,0,0,,,FFE0,FFFF
msp430fg4270,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430fw423,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,E000,FFDF,0,0,,,FFE0,FFFF
msp430fw425,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430fw427,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430fw428,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF
msp430fw429,0,0,0,0,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF
msp430fg437,0,0,0,0,EMEX_LOW,2,EXTENDED,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,8000,FFDF,0,0,,,FFE0,FFFF
msp430fg438,0,0,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF
msp430fg439,0,0,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF
msp430f438,0,0,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,4000,FFDF,0,0,,,FFE0,FFFF
msp430f439,0,0,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,80,10FF,1080,1000,0,0,1100,FFDF,0,0,,,FFE0,FFFF
msp430f477,0,0,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDF,0,0,,,FFE0,FFFF
msp430f478,0,0,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFDF,0,0,,,FFE0,FFFF
msp430f479,0,0,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFDF,0,0,,,FFE0,FFFF
msp430fg477,0,CPU19,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDF,0,0,,,FFE0,FFFF
msp430fg478,0,CPU19,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFDF,0,0,,,FFE0,FFFF
msp430fg479,0,CPU19,0,0,EMEX_LOW,2,EXTENDED,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,1100,FFDF,0,0,,,FFE0,FFFF
msp430f46161,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
msp430f46171,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
msp430f46181,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
msp430f46191,1,0,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
msp430f4616,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
msp430f4617,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
msp430f4618,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
msp430f4619,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
msp430fg4616,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,18FFF,FFBE,2,FFC0,FFFF
msp430fg4617,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,19FFF,FFBE,2,FFC0,FFFF
msp430fg4618,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,30FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,3100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
msp430fg4619,1,CPU16,1,0,EMEX_HIGH,8,EXTENDED,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,80,10FF,1080,1000,0,0,2100,FFBD,10000,1FFFF,FFBE,2,FFC0,FFFF
msp430f5418,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,25BFB,,,FF80,FFFF
msp430f5419,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,25BFB,,,FF80,FFFF
msp430f5435,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,35BFB,,,FF80,FFFF
msp430f5436,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,35BFB,,,FF80,FFFF
msp430f5437,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFB,,,FF80,FFFF
msp430f5438,2,CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFB,,,FF80,FFFF
msp430f5418a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,25BFF,,,FF80,FFFF
msp430f5419a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,25BFF,,,FF80,FFFF
msp430f5435a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,35BFF,,,FF80,FFFF
msp430f5436a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,35BFF,,,FF80,FFFF
msp430f5437a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF
msp430f5438a,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF
msp430f5212,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
msp430f5213,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF
msp430f5214,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
msp430f5217,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
msp430f5218,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF
msp430f5219,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
msp430f5222,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
msp430f5223,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF
msp430f5224,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
msp430f5227,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
msp430f5228,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF
msp430f5229,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
msp430f5232,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
msp430f5234,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
msp430f5237,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
msp430f5239,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
msp430f5242,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
msp430f5244,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
msp430f5247,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
msp430f5249,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
msp430f5304,2,CPU21; CPU22; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF
msp430f5308,2,CPU21; CPU22; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
msp430f5309,2,CPU21; CPU22; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A000,FF7F,0,0,,,FF80,FFFF
msp430f5310,2,CPU21; CPU22; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
msp430f5340,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
msp430f5341,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF
msp430f5342,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
msp430f5324,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
msp430f5325,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,33FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
msp430f5326,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF
msp430f5327,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF
msp430f5328,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
msp430f5329,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
msp430f5500,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF
msp430f5501,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
msp430f5502,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A000,FF7F,0,0,,,FF80,FFFF
msp430f5503,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
msp430f5504,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF
msp430f5505,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
msp430f5506,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A000,FF7F,0,0,,,FF80,FFFF
msp430f5507,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
msp430f5508,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
msp430f5509,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A000,FF7F,0,0,,,FF80,FFFF
msp430f5510,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
msp430f5513,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
msp430f5514,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
msp430f5515,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
msp430f5517,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,3BFF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF
msp430f5519,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
msp430f5521,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,3BFF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
msp430f5522,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
msp430f5524,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
msp430f5525,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,33FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
msp430f5526,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,3BFF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF
msp430f5527,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,3BFF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1C3FF,,,FF80,FFFF
msp430f5528,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
msp430f5529,2,CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
msp430p112,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F000,FFDF,0,0,,,FFE0,FFFF
msp430p313,0,0,0,0,NONE,0,NONE,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,E000,FFDF,0,0,,,FFE0,FFFF
msp430p315,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430p315s,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430p325,0,0,0,0,NONE,0,NONE,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,C000,FFDF,0,0,,,FFE0,FFFF
msp430p337,0,0,1,0,NONE,0,NONE,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8000,FFDF,0,0,,,FFE0,FFFF
cc430f5133,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF
cc430f5135,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
cc430f5137,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
cc430f6125,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
cc430f6126,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
cc430f6127,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
cc430f6135,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
cc430f6137,2,CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
cc430f5123,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF
cc430f5125,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
cc430f5143,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF
cc430f5145,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
cc430f5147,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
cc430f6143,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF
cc430f6145,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
cc430f6147,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFD,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
msp430f5333,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF
msp430f5335,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF
msp430f5336,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF
msp430f5338,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF
msp430f5630,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF
msp430f5631,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF
msp430f5632,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF
msp430f5633,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF
msp430f5634,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF
msp430f5635,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF
msp430f5636,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF
msp430f5637,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF
msp430f5638,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF
msp430f6433,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF
msp430f6435,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF
msp430f6436,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF
msp430f6438,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF
msp430f6630,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF
msp430f6631,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF
msp430f6632,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF
msp430f6633,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF
msp430f6634,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF
msp430f6635,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF
msp430f6636,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,27FFF,,,FF80,FFFF
msp430f6637,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,37FFF,,,FF80,FFFF
msp430f6638,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,47FFF,,,FF80,FFFF
msp430f5358,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,F8000,FBFFF,0,0,0,0,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,67FFF,,,FF80,FFFF
msp430f5359,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,F0000,FBFFF,0,0,0,0,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,87FFF,,,FF80,FFFF
msp430f5658,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,F8000,FBFFF,0,0,1C00,23FF,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,67FFF,,,FF80,FFFF
msp430f5659,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,F0000,FBFFF,0,0,1C00,23FF,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,87FFF,,,FF80,FFFF
msp430f6458,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,F8000,FBFFF,0,0,0,0,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,67FFF,,,FF80,FFFF
msp430f6459,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,63FF,F0000,FBFFF,0,0,0,0,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,87FFF,,,FF80,FFFF
msp430f6658,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,F8000,FBFFF,0,0,1C00,23FF,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,67FFF,,,FF80,FFFF
msp430f6659,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,63FF,F0000,FBFFF,0,0,1C00,23FF,0,0,2400,FC000,FFFFF,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,10000,87FFF,,,FF80,FFFF
msp430fg6425,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
msp430fg6426,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,43FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
msp430fg6625,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,143FF,,,FF80,FFFF
msp430fg6626,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,2400,43FF,0,0,0,0,1C00,23FF,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,243FF,,,FF80,FFFF
msp430l092,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,1C80,237F,0,0,,,1C60,1C7F
msp430c091,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,FC80,FFDF,0,0,,,FFE0,FFFF
msp430c092,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,2380,23FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1C00,60,1C5F,1C00,0,0,0,F880,FFDF,0,0,,,FFE0,FFFF
msp430xgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
msp430f5xx_6xxgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
msp430fr5xx_6xxgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
msp430fr2xx_4xxgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
msp430fr57xxgeneric,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,6400,FF7F,10000,463FF,,,FF80,FFFF
msp430i2xxgeneric,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,C000,FFDB,0,0,FFDC,4,FF80,FFFF
msp430f5131,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF
msp430f5151,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
msp430f5171,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
msp430f5132,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,E000,FF7F,0,0,,,FF80,FFFF
msp430f5152,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
msp430f5172,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
msp430f6720,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
msp430f6721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
msp430f6723,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF
msp430f6724,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,1BFFF,,,FF80,FFFF
msp430f6725,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF
msp430f6726,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF
msp430f6730,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
msp430f6731,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
msp430f6733,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF
msp430f6734,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,1BFFF,,,FF80,FFFF
msp430f6735,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF
msp430f6736,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF
msp430f67621,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF
msp430f67641,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF
msp430f6720a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
msp430f6721a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
msp430f6723a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF
msp430f6724a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,1BFFF,,,FF80,FFFF
msp430f6725a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF
msp430f6726a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF
msp430f6730a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
msp430f6731a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
msp430f6733a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF
msp430f6734a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,1BFFF,,,FF80,FFFF
msp430f6735a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF
msp430f6736a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,3BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF
msp430f67621a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,13FFF,,,FF80,FFFF
msp430f67641a,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,,,FF80,FFFF
msp430f67451,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF
msp430f67651,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF
msp430f67751,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF
msp430f67461,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f67661,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f67761,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f67471,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f67671,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f67771,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f67481,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f67681,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f67781,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f67491,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f67691,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f67791,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f6745,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF
msp430f6765,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF
msp430f6775,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF
msp430f6746,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f6766,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f6776,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f6747,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f6767,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f6777,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f6748,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f6768,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f6778,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f6749,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f6769,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f6779,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f67451a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF
msp430f67651a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF
msp430f67751a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF
msp430f67461a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f67661a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f67761a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f67471a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f67671a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f67771a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f67481a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f67681a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f67781a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f67491a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f67691a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f67791a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f6745a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF
msp430f6765a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF
msp430f6775a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,2BFFF,,,FF80,FFFF
msp430f6746a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f6766a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f6776a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f6747a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f6767a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f6777a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,4BFFF,,,FF80,FFFF
msp430f6748a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f6768a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f6778a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f6749a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f6769a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430f6779a,2,CPU21; CPU22; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,9BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,10000,8BFFF,,,FF80,FFFF
msp430fr5720,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,F000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,F000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5722,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5723,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5724,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5725,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5726,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5727,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5728,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5729,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5730,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,F000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5731,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,F000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5732,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5733,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5734,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5735,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,E000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5736,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5737,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5738,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5739,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,18FF,1880,1800,0,0,C200,FF7F,0,0,FF80,10,FF90,FFFF
msp430g2211,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF
msp430g2201,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF
msp430g2111,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF
msp430g2101,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF
msp430g2001,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FE00,FFDF,0,0,,,FFE0,FFFF
msp430g2231,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF
msp430g2221,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF
msp430g2131,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF
msp430g2121,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF
msp430afe221,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDF,0,0,,,FFE0,FFFF
msp430afe231,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDF,0,0,,,FFE0,FFFF
msp430afe251,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDF,0,0,,,FFE0,FFFF
msp430afe222,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDF,0,0,,,FFE0,FFFF
msp430afe232,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDF,0,0,,,FFE0,FFFF
msp430afe252,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDF,0,0,,,FFE0,FFFF
msp430afe223,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDF,0,0,,,FFE0,FFFF
msp430afe233,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDF,0,0,,,FFE0,FFFF
msp430afe253,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDF,0,0,,,FFE0,FFFF
msp430g2102,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF
msp430g2202,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF
msp430g2302,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDF,0,0,,,FFE0,FFFF
msp430g2402,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDF,0,0,,,FFE0,FFFF
msp430g2132,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF
msp430g2232,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF
msp430g2332,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDF,0,0,,,FFE0,FFFF
msp430g2432,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDF,0,0,,,FFE0,FFFF
msp430g2112,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF
msp430g2212,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF
msp430g2312,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDF,0,0,,,FFE0,FFFF
msp430g2412,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDF,0,0,,,FFE0,FFFF
msp430g2152,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDF,0,0,,,FFE0,FFFF
msp430g2252,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF
msp430g2352,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDF,0,0,,,FFE0,FFFF
msp430g2452,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDF,0,0,,,FFE0,FFFF
msp430g2113,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2213,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2313,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2413,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2513,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2153,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,FC00,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2253,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2353,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2453,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2553,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2203,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2303,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2403,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2233,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2333,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,02FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2433,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2533,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430tch5e,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2444,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,E000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2544,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,03FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,C000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2744,0,CPU19,0,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2755,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,8000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2855,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,4000,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2955,0,0,0,1,EMEX_LOW,2,STANDARD,0,80,1100,20FF,0,0,0,0,0,0,0,0,1100,200,9FF,0,0,0,1000,40,10FF,10C0,1080,1040,1000,2100,FFDD,0,0,FFDE,2,FFE0,FFFF
msp430g2230,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF
msp430g2210,0,0,0,1,EMEX_LOW,2,STANDARD,0,50,200,027F,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,40,10FF,10C0,1080,1040,1000,F800,FFDF,0,0,,,FFE0,FFFF
msp430bt5190,2,CPU21; CPU22; CPU23; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF
msp430fr5857,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5858,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5859,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr5847,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr58471,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5848,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5849,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr5867,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr58671,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5868,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5869,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr5957,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5958,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5959,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr5947,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr59471,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5948,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5949,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr5967,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5968,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5969,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr59691,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430i2020,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,C000,FFDB,0,0,FFDC,4,FFE0,FFFF
msp430i2021,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,8000,FFDB,0,0,FFDC,4,FFE0,FFFF
msp430i2030,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,C000,FFDB,0,0,FFDC,4,FFE0,FFFF
msp430i2031,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,8000,FFDB,0,0,FFDC,4,FFE0,FFFF
msp430i2040,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,05FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,C000,FFDB,0,0,FFDC,4,FFE0,FFFF
msp430i2041,0,0,2,1,EMEX_LOW,2,STANDARD,0,80,200,09FF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1000,0,0,0,8000,FFDB,0,0,FFDC,4,FFE0,FFFF
rf430frl152h,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
rf430frl153h,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
rf430frl154h,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,2BFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
rf430frl152h_rom,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
rf430frl153h_rom,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
rf430frl154h_rom,0,CPU21; CPU22; CPU40,0,0,EMEX_EXTRA_SMALL_5XX,2,EXTENDED,1,80,1C00,1DFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,F840,FFCF,0,0,FFD0,6,FFE0,FFFF
rf430f5175,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,,,FF80,FFFF
rf430f5155,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
rf430f5144,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,80,1C00,1FFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,C000,FF7F,0,0,,,FF80,FFFF
msp430fr69271,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr68791,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF
msp430fr69791,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF
msp430fr6927,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr6928,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1BFFF,FF80,10,FF90,FFFF
msp430fr6877,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr6977,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr6879,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF
msp430fr6979,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF
msp430fr58891,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF
msp430fr68891,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF
msp430fr59891,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF
msp430fr69891,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF
msp430fr5887,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr5888,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1BFFF,FF80,10,FF90,FFFF
msp430fr5889,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF
msp430fr6887,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr6888,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1BFFF,FF80,10,FF90,FFFF
msp430fr6889,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF
msp430fr5986,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5987,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr5988,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1BFFF,FF80,10,FF90,FFFF
msp430fr5989,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF
msp430fr6987,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr6988,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,1BFFF,FF80,10,FF90,FFFF
msp430fr6989,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,23FFF,FF80,10,FF90,FFFF
msp430fr5922,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr5870,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5970,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5872,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr5972,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr6820,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr6920,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr6822,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr6922,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr6870,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr6970,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,8000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr6872,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr6972,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr59221,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr58721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr59721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr68221,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr69221,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr68721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430fr69721,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,23FF,0,0,6,001F,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,4400,FF7F,10000,13FFF,FF80,10,FF90,FFFF
msp430sl5438a,2,CPU21; CPU22; CPU23; CPU30; CPU40,8,2,EMEX_LARGE_5XX,8,EXTENDED,2,160,1C00,5BFF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,5C00,FF7F,10000,45BFF,,,FF80,FFFF
msp430fr4131,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,21FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,F000,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr4132,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,E000,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr4133,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr2032,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,E000,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr2033,2,CPU21; CPU22; CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr2110,2,CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,F800,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr2111,2,CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,F100,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr2310,2,CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,F800,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr2311,2,CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,F100,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr2433,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr2532,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,23FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,E000,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr2533,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr2632,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,E000,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr2633,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1800,0,0,0,C400,FF7F,0,0,FF80,8,FF88,FFFF
msp430f5252,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF
msp430f5253,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF
msp430f5254,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,A3FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF
msp430f5255,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,A3FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF
msp430f5256,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF
msp430f5257,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,63FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF
msp430f5258,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,A3FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF
msp430f5259,2,CPU21; CPU22; CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2400,A3FF,0,0,0,0,0,0,0,0,0,0,0,1000,200,17FF,1800,80,19FF,1980,1900,1880,1800,A400,FF7F,10000,2A3FF,,,FF80,FFFF
msp430fr5962,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,3BFF,0,0,A,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF
msp430fr5964,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,3BFF,0,0,A,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
msp430fr5992,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF
msp430fr5994,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
msp430fr59941,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,1800,200,19FF,1980,1900,1880,1800,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
msp430fr2000,2,CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,21FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,FE00,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr2100,2,CPU40,0,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,21FF,0,0,0,0,0,0,0,0,0,0,0,1000,400,13FF,0,0,0,0,0,0,0,FC00,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr2353,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,C000,FF7F,0,0,FF80,22,FFA2,FFFF
msp430fr2355,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF
msp430fr2153,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,C000,FF7F,0,0,FF80,22,FFA2,FFFF
msp430fr2155,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF
msp430fr2422,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,100,18FF,0,0,0,0,E300,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr2522,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,100,18FF,0,0,0,0,E300,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr2512,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,27FF,0,0,0,0,0,0,0,0,0,0,0,1000,800,17FF,1800,100,18FF,0,0,0,0,E300,FF7F,0,0,FF80,8,FF88,FFFF
msp430fr2676,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,3FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,10000,17FFF,FF80,22,FFA2,FFFF
msp430fr2675,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,37FF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF
msp430fr2476,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,3FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,10000,17FFF,FF80,22,FFA2,FFFF
msp430fr2475,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,2000,2FFF,0,0,6,001F,0,0,0,0,0,0,0,1000,800,17FF,1800,200,19FF,0,0,0,0,8000,FF7F,0,0,FF80,22,FFA2,FFFF
msp430fr50431,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF
msp430fr6041,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,8000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr6043,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF
msp430fr5041,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,8000,FF7F,0,0,FF80,10,FF90,FFFF
msp430fr5043,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF
msp430fr60431,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,5000,5FFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,6000,FF7F,10000,15FFF,FF80,10,FF90,FFFF
msp430fr6037,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
msp430fr6035,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF
msp430fr60471,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
msp430fr60371,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
msp430fr6045,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,23FFF,FF80,10,FF90,FFFF
msp430fr6047,2,CPU40,8,2,EMEX_SMALL_5XX,3,EXTENDED,1,160,1C00,2BFF,0,0,A,001F,0,0,2C00,3BFF,0,0,0,1000,800,17FF,0,0,0,0,0,0,0,4000,FF7F,10000,43FFF,FF80,10,FF90,FFFF
1 # /* ============================================================================ */
2 # /* Copyright (c) 2016 Texas Instruments Incorporated */
3 # /* All rights reserved. */
4 # /* */
5 # /* Redistribution and use in source and binary forms with or without */
6 # /* modification are permitted provided that the following conditions */
7 # /* are met: */
8 # /* */
9 # /* * Redistributions of source code must retain the above copyright */
10 # /* notice this list of conditions and the following disclaimer. */
11 # /* */
12 # /* * Redistributions in binary form must reproduce the above copyright */
13 # /* notice this list of conditions and the following disclaimer in the */
14 # /* documentation and/or other materials provided with the distribution. */
15 # /* */
16 # /* * Neither the name of Texas Instruments Incorporated nor the names of */
17 # /* its contributors may be used to endorse or promote products derived */
18 # /* from this software without specific prior written permission. */
19 # /* */
20 # /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
21 # /* AND ANY EXPRESS OR IMPLIED WARRANTIES INCLUDING BUT NOT LIMITED TO */
22 # /* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
23 # /* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
24 # /* CONTRIBUTORS BE LIABLE FOR ANY DIRECT INDIRECT INCIDENTAL SPECIAL */
25 # /* EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING BUT NOT LIMITED TO */
26 # /* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE DATA OR PROFITS; */
27 # /* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY */
28 # /* WHETHER IN CONTRACT STRICT LIABILITY OR TORT (INCLUDING NEGLIGENCE OR */
29 # /* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE */
30 # /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
31 # /* ============================================================================ */
32
33 Version: 1.208 Date: 08/21/19 15:53:27
34
35 # ============================================================================
36 # CPU
37 # 0 STD MSP430 CPU
38 # 1 MSP430X CPU
39 # 2 MSP430XV2 CPU
40 #
41 #
42 # HWMPY
43 # 0 No Hardware Multiplier
44 # 1 16 Bit Hardware Multiplier
45 # 2 16 Bit Hardware Multiplier with sign Extension (2xx Devices)
46 #
47 # 4 32 Bit Hardware Multiplier
48 # 8 32 Bit Hardware Multiplier (5xx)
49 #
50 #
51 # SPI2Wire
52 # 0 JTAG only - no scan
53 # 1 SBW (default) - scan allowed
54 # 2 JTAG (Default) - scan allowed
55 # 3 SBW only - no scan
56 # ============================================================================
57
58
59 # Device Name CPU_TYPE CPU_Bugs MPY_TYPE SBW EEM BREAKPOINTS CLOCKCONTROL CYCLECOUNTER STACKSIZE RAMStart RAMEnd RAMStart2 RAMEnd2 TINYRAMStart TINYRAMEnd USBRAMStart USBRAMEnd LEARAMStart LEARAMEnd MirrowedRAMSource MirrowedRAMStart MirrowedRAMEnd BSLStart BSLSize BSLEnd INFOStart INFOSize INFOEnd INFOA INFOB INFOC INFOD FStart FEnd FStart2 FEnd2 Signature_Start Signature_Size INTStart INTEnd
60 msp430c111 0 0 0 0 NONE 0 NONE 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F800 FFDF 0 0 FFE0 FFFF
61 msp430c1111 0 0 0 0 NONE 0 NONE 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F800 FFDF 0 0 FFE0 FFFF
62 msp430c112 0 0 0 0 NONE 0 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F000 FFDF 0 0 FFE0 FFFF
63 msp430c1121 0 0 0 0 NONE 0 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F000 FFDF 0 0 FFE0 FFFF
64 msp430c1331 0 0 0 0 NONE 0 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E000 FFDF 0 0 FFE0 FFFF
65 msp430c1351 0 0 0 0 NONE 0 NONE 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C000 FFDF 0 0 FFE0 FFFF
66 msp430c311s 0 0 0 0 NONE 0 NONE 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F800 FFDF 0 0 FFE0 FFFF
67 msp430c312 0 0 0 0 NONE 0 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F000 FFDF 0 0 FFE0 FFFF
68 msp430c313 0 0 0 0 NONE 0 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E000 FFDF 0 0 FFE0 FFFF
69 msp430c314 0 0 0 0 NONE 0 NONE 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D000 FFDF 0 0 FFE0 FFFF
70 msp430c315 0 0 0 0 NONE 0 NONE 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C000 FFDF 0 0 FFE0 FFFF
71 msp430c323 0 0 0 0 NONE 0 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E000 FFDF 0 0 FFE0 FFFF
72 msp430c325 0 0 0 0 NONE 0 NONE 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C000 FFDF 0 0 FFE0 FFFF
73 msp430c336 0 0 1 0 NONE 0 NONE 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A000 FFDF 0 0 FFE0 FFFF
74 msp430c337 0 0 1 0 NONE 0 NONE 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8000 FFDF 0 0 FFE0 FFFF
75 msp430c412 0 0 0 0 NONE 0 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F000 FFDF 0 0 FFE0 FFFF
76 msp430c413 0 0 0 0 NONE 0 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E000 FFDF 0 0 FFE0 FFFF
77 msp430cg4616 1 CPU16 1 0 NONE 0 NONE 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 2100 FFBF 10000 18FFF FFC0 FFFF
78 msp430cg4617 1 CPU16 1 0 NONE 0 NONE 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 3100 FFBF 10000 19FFF FFC0 FFFF
79 msp430cg4618 1 CPU16 1 0 NONE 0 NONE 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 3100 FFBF 10000 1FFFF FFC0 FFFF
80 msp430cg4619 1 CPU16 1 0 NONE 0 NONE 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 2100 FFBF 10000 1FFFF FFC0 FFFF
81 msp430e112 0 0 0 0 NONE 0 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F000 FFDF 0 0 FFE0 FFFF
82 msp430e313 0 0 0 0 NONE 0 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E000 FFDF 0 0 FFE0 FFFF
83 msp430e315 0 0 0 0 NONE 0 NONE 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C000 FFDF 0 0 FFE0 FFFF
84 msp430e325 0 0 0 0 NONE 0 NONE 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C000 FFDF 0 0 FFE0 FFFF
85 msp430e337 0 0 1 0 NONE 0 NONE 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8000 FFDF 0 0 FFE0 FFFF
86 msp430f110 0 0 0 0 EMEX_LOW 2 NONE 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1080 80 10FF 1080 0 0 0 FC00 FFDF 0 0 FFE0 FFFF
87 msp430f1101 0 0 0 0 EMEX_LOW 2 NONE 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1080 80 10FF 1080 0 0 0 FC00 FFDF 0 0 FFE0 FFFF
88 msp430f1101a 0 0 0 0 EMEX_LOW 2 NONE 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1080 80 10FF 1080 0 0 0 FC00 FFDF 0 0 FFE0 FFFF
89 msp430f1111 0 0 0 0 EMEX_LOW 2 NONE 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 F800 FFDF 0 0 FFE0 FFFF
90 msp430f1111a 0 0 0 0 EMEX_LOW 2 NONE 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 F800 FFDF 0 0 FFE0 FFFF
91 msp430f112 0 0 0 0 EMEX_LOW 2 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 F000 FFDF 0 0 FFE0 FFFF
92 msp430f1121 0 0 0 0 EMEX_LOW 2 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 F000 FFDF 0 0 FFE0 FFFF
93 msp430f1121a 0 0 0 0 EMEX_LOW 2 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 F000 FFDF 0 0 FFE0 FFFF
94 msp430f1122 0 0 0 0 EMEX_LOW 2 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 F000 FFDF 0 0 FFE0 FFFF
95 msp430f1132 0 0 0 0 EMEX_LOW 2 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 E000 FFDF 0 0 FFE0 FFFF
96 msp430f122 0 0 0 0 EMEX_LOW 2 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 F000 FFDF 0 0 FFE0 FFFF
97 msp430f1222 0 0 0 0 EMEX_LOW 2 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 F000 FFDF 0 0 FFE0 FFFF
98 msp430f123 0 0 0 0 EMEX_LOW 2 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 E000 FFDF 0 0 FFE0 FFFF
99 msp430f1232 0 0 0 0 EMEX_LOW 2 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 E000 FFDF 0 0 FFE0 FFFF
100 msp430f133 0 0 0 0 EMEX_MEDIUM 3 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 E000 FFDF 0 0 FFE0 FFFF
101 msp430f135 0 0 0 0 EMEX_MEDIUM 3 NONE 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 C000 FFDF 0 0 FFE0 FFFF
102 msp430f147 0 0 1 0 EMEX_MEDIUM 3 NONE 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
103 msp430f148 0 0 1 0 EMEX_MEDIUM 3 NONE 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 4000 FFDF 0 0 FFE0 FFFF
104 msp430f149 0 0 1 0 EMEX_MEDIUM 3 NONE 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 1100 FFDF 0 0 FFE0 FFFF
105 msp430f1471 0 0 1 0 EMEX_MEDIUM 3 NONE 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
106 msp430f1481 0 0 1 0 EMEX_MEDIUM 3 NONE 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 4000 FFDF 0 0 FFE0 FFFF
107 msp430f1491 0 0 1 0 EMEX_MEDIUM 3 NONE 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 1100 FFDF 0 0 FFE0 FFFF
108 msp430f155 0 0 0 0 EMEX_HIGH 8 EXTENDED 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 C000 FFDF 0 0 FFE0 FFFF
109 msp430f156 0 0 0 0 EMEX_HIGH 8 EXTENDED 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 A000 FFDF 0 0 FFE0 FFFF
110 msp430f157 0 0 0 0 EMEX_HIGH 8 EXTENDED 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
111 msp430f167 0 0 1 0 EMEX_HIGH 8 EXTENDED 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
112 msp430f168 0 0 1 0 EMEX_HIGH 8 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 4000 FFDF 0 0 FFE0 FFFF
113 msp430f169 0 0 1 0 EMEX_HIGH 8 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 1100 FFDF 0 0 FFE0 FFFF
114 msp430f1610 0 0 1 0 EMEX_HIGH 8 EXTENDED 0 80 1100 24FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
115 msp430f1611 0 0 1 0 EMEX_HIGH 8 EXTENDED 0 80 1100 38FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 4000 FFDF 0 0 FFE0 FFFF
116 msp430f1612 0 0 1 0 EMEX_HIGH 8 EXTENDED 0 80 1100 24FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 2500 FFDF 0 0 FFE0 FFFF
117 msp430f2001 0 0 0 1 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 FC00 FFDF 0 0 FFE0 FFFF
118 msp430f2011 0 0 0 1 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDF 0 0 FFE0 FFFF
119 msp430f2002 0 0 0 1 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 FC00 FFDF 0 0 FFE0 FFFF
120 msp430f2012 0 0 0 1 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDF 0 0 FFE0 FFFF
121 msp430f2003 0 0 0 1 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 FC00 FFDF 0 0 FFE0 FFFF
122 msp430f2013 0 0 0 1 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDF 0 0 FFE0 FFFF
123 msp430f2101 0 CPU19 0 0 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 FC00 FFDD 0 0 FFDE 2 FFE0 FFFF
124 msp430f2111 0 CPU19 0 0 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDD 0 0 FFDE 2 FFE0 FFFF
125 msp430f2121 0 CPU19 0 0 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F000 FFDD 0 0 FFDE 2 FFE0 FFFF
126 msp430f2131 0 CPU19 0 0 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDD 0 0 FFDE 2 FFE0 FFFF
127 msp430f2112 0 CPU19 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDD 0 0 FFDE 2 FFE0 FFFF
128 msp430f2122 0 CPU19 0 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F000 FFDD 0 0 FFDE 2 FFE0 FFFF
129 msp430f2132 0 CPU19 0 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDD 0 0 FFDE 2 FFE0 FFFF
130 msp430f2232 0 CPU19 0 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDD 0 0 FFDE 2 FFE0 FFFF
131 msp430f2252 0 CPU19 0 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 C000 FFDD 0 0 FFDE 2 FFE0 FFFF
132 msp430f2272 0 CPU19 0 1 EMEX_LOW 2 STANDARD 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 8000 FFDD 0 0 FFDE 2 FFE0 FFFF
133 msp430f2234 0 CPU19 0 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDD 0 0 FFDE 2 FFE0 FFFF
134 msp430f2254 0 CPU19 0 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 C000 FFDD 0 0 FFDE 2 FFE0 FFFF
135 msp430f2274 0 CPU19 0 1 EMEX_LOW 2 STANDARD 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 8000 FFDD 0 0 FFDE 2 FFE0 FFFF
136 msp430f2330 0 0 2 0 EMEX_LOW 2 STANDARD 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDD 0 0 FFDE 2 FFE0 FFFF
137 msp430f2350 0 0 2 0 EMEX_LOW 2 STANDARD 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 C000 FFDD 0 0 FFDE 2 FFE0 FFFF
138 msp430f2370 0 0 2 0 EMEX_LOW 2 STANDARD 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 8000 FFDD 0 0 FFDE 2 FFE0 FFFF
139 msp430f233 0 0 2 0 EMEX_MEDIUM 3 EXTENDED 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDD 0 0 FFDE 2 FFE0 FFFF
140 msp430f235 0 0 2 0 EMEX_MEDIUM 3 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 C000 FFDD 0 0 FFDE 2 FFE0 FFFF
141 msp430f247 0 CPU19 2 0 EMEX_MEDIUM 3 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 8000 FFBF 0 0 FFDE 2 FFC0 FFFF
142 msp430f248 0 CPU19 2 0 EMEX_MEDIUM 3 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 4000 FFBF 0 0 FFDE 2 FFC0 FFFF
143 msp430f249 0 CPU19 2 0 EMEX_MEDIUM 3 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 1100 FFBF 0 0 FFDE 2 FFC0 FFFF
144 msp430f2410 0 CPU19 2 0 EMEX_MEDIUM 3 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 2100 FFBF 0 0 FFDE 2 FFC0 FFFF
145 msp430f2471 0 0 2 0 EMEX_MEDIUM 3 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 8000 FFBF 0 0 FFDE 2 FFC0 FFFF
146 msp430f2481 0 0 2 0 EMEX_MEDIUM 3 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 4000 FFBF 0 0 FFDE 2 FFC0 FFFF
147 msp430f2491 0 0 2 0 EMEX_MEDIUM 3 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 1100 FFBF 0 0 FFDE 2 FFC0 FFFF
148 msp430f2416 1 CPU16 2 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 2100 FFBD 10000 18FFF FFBE 2 FFC0 FFFF
149 msp430f2417 1 CPU16 2 0 EMEX_HIGH 8 EXTENDED 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 3100 FFBD 10000 19FFF FFBE 2 FFC0 FFFF
150 msp430f2418 1 CPU16 2 0 EMEX_HIGH 8 EXTENDED 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 3100 FFBD 10000 1FFFF FFBE 2 FFC0 FFFF
151 msp430f2419 1 CPU16 2 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 2100 FFBD 10000 1FFFF FFBE 2 FFC0 FFFF
152 msp430f2616 1 CPU16 2 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 2100 FFBD 10000 18FFF FFBE 2 FFC0 FFFF
153 msp430f2617 1 CPU16 2 0 EMEX_HIGH 8 EXTENDED 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 3100 FFBD 10000 19FFF FFBE 2 FFC0 FFFF
154 msp430f2618 1 CPU16 2 0 EMEX_HIGH 8 EXTENDED 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 3100 FFBD 10000 1FFFF FFBE 2 FFC0 FFFF
155 msp430f2619 1 CPU16 2 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 2100 FFBD 10000 1FFFF FFBE 2 FFC0 FFFF
156 msp430f412 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 F000 FFBD 0 0 FFE0 FFFF
157 msp430f413 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 E000 FFDF 0 0 FFE0 FFFF
158 msp430f415 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 C000 FFDF 0 0 FFE0 FFFF
159 msp430f417 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
160 msp430f4132 0 CPU19 0 1 EMEX_LOW 2 EXTENDED 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDF 0 0 FFE0 FFFF
161 msp430f4152 0 CPU19 0 1 EMEX_LOW 2 EXTENDED 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 C000 FFDF 0 0 FFE0 FFFF
162 msp430f423 0 0 1 0 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 E000 FFDF 0 0 FFE0 FFFF
163 msp430f425 0 0 1 0 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 C000 FFDF 0 0 FFE0 FFFF
164 msp430f427 0 0 1 0 EMEX_LOW 2 STANDARD 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
165 msp430f423a 0 0 1 0 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 E000 FFDF 0 0 FFE0 FFFF
166 msp430f425a 0 0 1 0 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 C000 FFDF 0 0 FFE0 FFFF
167 msp430f427a 0 0 1 0 EMEX_LOW 2 STANDARD 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
168 msp430f435 0 0 0 0 EMEX_HIGH 8 EXTENDED 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 C000 FFDF 0 0 FFE0 FFFF
169 msp430f436 0 0 0 0 EMEX_HIGH 8 EXTENDED 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 A000 FFDF 0 0 FFE0 FFFF
170 msp430f437 0 0 0 0 EMEX_HIGH 8 EXTENDED 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
171 msp430f4351 0 0 0 0 EMEX_HIGH 8 EXTENDED 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 C000 FFDF 0 0 FFE0 FFFF
172 msp430f4361 0 0 0 0 EMEX_HIGH 8 EXTENDED 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 A000 FFDF 0 0 FFE0 FFFF
173 msp430f4371 0 0 0 0 EMEX_HIGH 8 EXTENDED 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
174 msp430f4481 0 0 1 0 EMEX_HIGH 8 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 4000 FFDF 0 0 FFE0 FFFF
175 msp430f4491 0 0 1 0 EMEX_HIGH 8 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 1100 FFDF 0 0 FFE0 FFFF
176 msp430f447 0 0 1 0 EMEX_HIGH 8 EXTENDED 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
177 msp430f448 0 0 1 0 EMEX_HIGH 8 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 4000 FFDF 0 0 FFE0 FFFF
178 msp430f449 0 0 1 0 EMEX_HIGH 8 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 1100 FFDF 0 0 FFE0 FFFF
179 msp430fe423 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 E000 FFDF 0 0 FFE0 FFFF
180 msp430fe425 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 C000 FFDF 0 0 FFE0 FFFF
181 msp430fe427 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
182 msp430fe423a 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 E000 FFDF 0 0 FFE0 FFFF
183 msp430fe425a 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 C000 FFDF 0 0 FFE0 FFFF
184 msp430fe427a 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
185 msp430fe4232 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 E000 FFDF 0 0 FFE0 FFFF
186 msp430fe4242 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 D000 FFDF 0 0 FFE0 FFFF
187 msp430fe4252 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 C000 FFDF 0 0 FFE0 FFFF
188 msp430fe4272 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
189 msp430f4783 0 0 4 0 EMEX_LOW 2 STANDARD 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 4000 FFDF 0 0 FFE0 FFFF
190 msp430f4793 0 0 4 0 EMEX_LOW 2 STANDARD 0 80 200 0BFF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 1100 FFDF 0 0 FFE0 FFFF
191 msp430f4784 0 CPU19 4 0 EMEX_LOW 2 STANDARD 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 4000 FFDF 0 0 FFE0 FFFF
192 msp430f4794 0 CPU19 4 0 EMEX_LOW 2 STANDARD 0 80 200 0BFF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 1100 FFDF 0 0 FFE0 FFFF
193 msp430f47126 1 0 4 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 2100 FFBD 0 0 FFBE 2 FFC0 FFFF
194 msp430f47127 1 CPU19 4 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 2100 FFBD 0 0 FFBE 2 FFC0 FFFF
195 msp430f47163 1 0 4 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 2100 FFBD 10000 18FFF FFBE 2 FFC0 FFFF
196 msp430f47173 1 0 4 0 EMEX_HIGH 8 EXTENDED 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 3100 FFBD 10000 19FFF FFBE 2 FFC0 FFFF
197 msp430f47183 1 0 4 0 EMEX_HIGH 8 EXTENDED 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 3100 FFBD 10000 1FFFF FFBE 2 FFC0 FFFF
198 msp430f47193 1 0 4 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 2100 FFBD 10000 1FFFF FFBE 2 FFC0 FFFF
199 msp430f47166 1 0 4 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 2100 FFBD 10000 18FFF FFBE 2 FFC0 FFFF
200 msp430f47176 1 0 4 0 EMEX_HIGH 8 EXTENDED 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 3100 FFBD 10000 19FFF FFBE 2 FFC0 FFFF
201 msp430f47186 1 0 4 0 EMEX_HIGH 8 EXTENDED 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 3100 FFBD 10000 1FFFF FFBE 2 FFC0 FFFF
202 msp430f47196 1 0 4 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 2100 FFBD 10000 1FFFF FFBE 2 FFC0 FFFF
203 msp430f47167 1 0 4 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 2100 FFBD 10000 18FFF FFBE 2 FFC0 FFFF
204 msp430f47177 1 0 4 0 EMEX_HIGH 8 EXTENDED 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 3100 FFBD 10000 19FFF FFBE 2 FFC0 FFFF
205 msp430f47187 1 0 4 0 EMEX_HIGH 8 EXTENDED 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 3100 FFBD 10000 1FFFF FFBE 2 FFC0 FFFF
206 msp430f47197 1 0 4 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 2100 FFBD 10000 1FFFF FFBE 2 FFC0 FFFF
207 msp430f4250 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 C000 FFDF 0 0 FFE0 FFFF
208 msp430f4260 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 A000 FFDF 0 0 FFE0 FFFF
209 msp430f4270 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
210 msp430fg4250 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 C000 FFDF 0 0 FFE0 FFFF
211 msp430fg4260 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 A000 FFDF 0 0 FFE0 FFFF
212 msp430fg4270 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
213 msp430fw423 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 E000 FFDF 0 0 FFE0 FFFF
214 msp430fw425 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 C000 FFDF 0 0 FFE0 FFFF
215 msp430fw427 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
216 msp430fw428 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 4000 FFDF 0 0 FFE0 FFFF
217 msp430fw429 0 0 0 0 EMEX_LOW 2 STANDARD 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 1100 FFDF 0 0 FFE0 FFFF
218 msp430fg437 0 0 0 0 EMEX_LOW 2 EXTENDED 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 8000 FFDF 0 0 FFE0 FFFF
219 msp430fg438 0 0 0 0 EMEX_LOW 2 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 4000 FFDF 0 0 FFE0 FFFF
220 msp430fg439 0 0 0 0 EMEX_LOW 2 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 1100 FFDF 0 0 FFE0 FFFF
221 msp430f438 0 0 0 0 EMEX_LOW 2 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 4000 FFDF 0 0 FFE0 FFFF
222 msp430f439 0 0 0 0 EMEX_LOW 2 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 80 10FF 1080 1000 0 0 1100 FFDF 0 0 FFE0 FFFF
223 msp430f477 0 0 0 0 EMEX_LOW 2 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 8000 FFDF 0 0 FFE0 FFFF
224 msp430f478 0 0 0 0 EMEX_LOW 2 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 4000 FFDF 0 0 FFE0 FFFF
225 msp430f479 0 0 0 0 EMEX_LOW 2 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 1100 FFDF 0 0 FFE0 FFFF
226 msp430fg477 0 CPU19 0 0 EMEX_LOW 2 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 8000 FFDF 0 0 FFE0 FFFF
227 msp430fg478 0 CPU19 0 0 EMEX_LOW 2 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 4000 FFDF 0 0 FFE0 FFFF
228 msp430fg479 0 CPU19 0 0 EMEX_LOW 2 EXTENDED 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 1100 FFDF 0 0 FFE0 FFFF
229 msp430f46161 1 0 1 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 2100 FFBD 10000 18FFF FFBE 2 FFC0 FFFF
230 msp430f46171 1 0 1 0 EMEX_HIGH 8 EXTENDED 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 3100 FFBD 10000 19FFF FFBE 2 FFC0 FFFF
231 msp430f46181 1 0 1 0 EMEX_HIGH 8 EXTENDED 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 3100 FFBD 10000 1FFFF FFBE 2 FFC0 FFFF
232 msp430f46191 1 0 1 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 2100 FFBD 10000 1FFFF FFBE 2 FFC0 FFFF
233 msp430f4616 1 CPU16 1 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 2100 FFBD 10000 18FFF FFBE 2 FFC0 FFFF
234 msp430f4617 1 CPU16 1 0 EMEX_HIGH 8 EXTENDED 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 3100 FFBD 10000 19FFF FFBE 2 FFC0 FFFF
235 msp430f4618 1 CPU16 1 0 EMEX_HIGH 8 EXTENDED 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 3100 FFBD 10000 1FFFF FFBE 2 FFC0 FFFF
236 msp430f4619 1 CPU16 1 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 2100 FFBD 10000 1FFFF FFBE 2 FFC0 FFFF
237 msp430fg4616 1 CPU16 1 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 2100 FFBD 10000 18FFF FFBE 2 FFC0 FFFF
238 msp430fg4617 1 CPU16 1 0 EMEX_HIGH 8 EXTENDED 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 3100 FFBD 10000 19FFF FFBE 2 FFC0 FFFF
239 msp430fg4618 1 CPU16 1 0 EMEX_HIGH 8 EXTENDED 0 80 1100 30FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 3100 FFBD 10000 1FFFF FFBE 2 FFC0 FFFF
240 msp430fg4619 1 CPU16 1 0 EMEX_HIGH 8 EXTENDED 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 80 10FF 1080 1000 0 0 2100 FFBD 10000 1FFFF FFBE 2 FFC0 FFFF
241 msp430f5418 2 CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 5C00 FF7F 10000 25BFB FF80 FFFF
242 msp430f5419 2 CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 5C00 FF7F 10000 25BFB FF80 FFFF
243 msp430f5435 2 CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 5C00 FF7F 10000 35BFB FF80 FFFF
244 msp430f5436 2 CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 5C00 FF7F 10000 35BFB FF80 FFFF
245 msp430f5437 2 CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 5C00 FF7F 10000 45BFB FF80 FFFF
246 msp430f5438 2 CPU15; CPU16; CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 5C00 FF7F 10000 45BFB FF80 FFFF
247 msp430f5418a 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 5C00 FF7F 10000 25BFF FF80 FFFF
248 msp430f5419a 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 5C00 FF7F 10000 25BFF FF80 FFFF
249 msp430f5435a 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 5C00 FF7F 10000 35BFF FF80 FFFF
250 msp430f5436a 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 5C00 FF7F 10000 35BFF FF80 FFFF
251 msp430f5437a 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 5C00 FF7F 10000 45BFF FF80 FFFF
252 msp430f5438a 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 5C00 FF7F 10000 45BFF FF80 FFFF
253 msp430f5212 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 143FF FF80 FFFF
254 msp430f5213 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 1C3FF FF80 FFFF
255 msp430f5214 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 243FF FF80 FFFF
256 msp430f5217 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 143FF FF80 FFFF
257 msp430f5218 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 1C3FF FF80 FFFF
258 msp430f5219 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 243FF FF80 FFFF
259 msp430f5222 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 143FF FF80 FFFF
260 msp430f5223 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 1C3FF FF80 FFFF
261 msp430f5224 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 243FF FF80 FFFF
262 msp430f5227 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 143FF FF80 FFFF
263 msp430f5228 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 1C3FF FF80 FFFF
264 msp430f5229 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 243FF FF80 FFFF
265 msp430f5232 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 143FF FF80 FFFF
266 msp430f5234 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 243FF FF80 FFFF
267 msp430f5237 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 143FF FF80 FFFF
268 msp430f5239 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 243FF FF80 FFFF
269 msp430f5242 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 143FF FF80 FFFF
270 msp430f5244 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 243FF FF80 FFFF
271 msp430f5247 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 143FF FF80 FFFF
272 msp430f5249 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 243FF FF80 FFFF
273 msp430f5304 2 CPU21; CPU22; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 33FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 E000 FF7F 0 0 FF80 FFFF
274 msp430f5308 2 CPU21; CPU22; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 33FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
275 msp430f5309 2 CPU21; CPU22; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 33FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 A000 FF7F 0 0 FF80 FFFF
276 msp430f5310 2 CPU21; CPU22; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 33FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
277 msp430f5340 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 33FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 143FF FF80 FFFF
278 msp430f5341 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 3BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 1C3FF FF80 FFFF
279 msp430f5342 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 243FF FF80 FFFF
280 msp430f5324 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 33FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 143FF FF80 FFFF
281 msp430f5325 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 33FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 143FF FF80 FFFF
282 msp430f5326 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 3BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 1C3FF FF80 FFFF
283 msp430f5327 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 3BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 1C3FF FF80 FFFF
284 msp430f5328 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 243FF FF80 FFFF
285 msp430f5329 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 243FF FF80 FFFF
286 msp430f5500 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 33FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 E000 FF7F 0 0 FF80 FFFF
287 msp430f5501 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 33FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
288 msp430f5502 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 33FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 A000 FF7F 0 0 FF80 FFFF
289 msp430f5503 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 33FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
290 msp430f5504 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 33FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 E000 FF7F 0 0 FF80 FFFF
291 msp430f5505 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 33FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
292 msp430f5506 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 33FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 A000 FF7F 0 0 FF80 FFFF
293 msp430f5507 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 33FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
294 msp430f5508 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 33FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
295 msp430f5509 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 33FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 A000 FF7F 0 0 FF80 FFFF
296 msp430f5510 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 33FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
297 msp430f5513 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 33FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
298 msp430f5514 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 33FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 143FF FF80 FFFF
299 msp430f5515 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 33FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 143FF FF80 FFFF
300 msp430f5517 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 3BFF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 1C3FF FF80 FFFF
301 msp430f5519 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 43FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 243FF FF80 FFFF
302 msp430f5521 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 3BFF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
303 msp430f5522 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 43FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
304 msp430f5524 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 33FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 143FF FF80 FFFF
305 msp430f5525 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 33FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 143FF FF80 FFFF
306 msp430f5526 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 3BFF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 1C3FF FF80 FFFF
307 msp430f5527 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 3BFF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 1C3FF FF80 FFFF
308 msp430f5528 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 43FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 243FF FF80 FFFF
309 msp430f5529 2 CPU21; CPU22; CPU23; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 43FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 243FF FF80 FFFF
310 msp430p112 0 0 0 0 NONE 0 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F000 FFDF 0 0 FFE0 FFFF
311 msp430p313 0 0 0 0 NONE 0 NONE 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 E000 FFDF 0 0 FFE0 FFFF
312 msp430p315 0 0 0 0 NONE 0 NONE 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C000 FFDF 0 0 FFE0 FFFF
313 msp430p315s 0 0 0 0 NONE 0 NONE 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C000 FFDF 0 0 FFE0 FFFF
314 msp430p325 0 0 0 0 NONE 0 NONE 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 C000 FFDF 0 0 FFE0 FFFF
315 msp430p337 0 0 1 0 NONE 0 NONE 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8000 FFDF 0 0 FFE0 FFFF
316 cc430f5133 2 CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FD 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 E000 FF7F 0 0 FF80 FFFF
317 cc430f5135 2 CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FD 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
318 cc430f5137 2 CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFD 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
319 cc430f6125 2 CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FD 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
320 cc430f6126 2 CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FD 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
321 cc430f6127 2 CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFD 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
322 cc430f6135 2 CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FD 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
323 cc430f6137 2 CPU18; CPU20; CPU21; CPU22; CPU23; CPU24; CPU25; CPU27; CPU29; CPU30; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFD 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
324 cc430f5123 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FD 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 E000 FF7F 0 0 FF80 FFFF
325 cc430f5125 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FD 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
326 cc430f5143 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FD 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 E000 FF7F 0 0 FF80 FFFF
327 cc430f5145 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FD 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
328 cc430f5147 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFD 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
329 cc430f6143 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FD 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 E000 FF7F 0 0 FF80 FFFF
330 cc430f6145 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FD 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
331 cc430f6147 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFD 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
332 msp430f5333 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 27FFF FF80 FFFF
333 msp430f5335 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 63FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 47FFF FF80 FFFF
334 msp430f5336 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 63FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 27FFF FF80 FFFF
335 msp430f5338 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 63FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 47FFF FF80 FFFF
336 msp430f5630 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 27FFF FF80 FFFF
337 msp430f5631 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 37FFF FF80 FFFF
338 msp430f5632 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 47FFF FF80 FFFF
339 msp430f5633 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 27FFF FF80 FFFF
340 msp430f5634 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 37FFF FF80 FFFF
341 msp430f5635 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 47FFF FF80 FFFF
342 msp430f5636 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 27FFF FF80 FFFF
343 msp430f5637 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 37FFF FF80 FFFF
344 msp430f5638 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 47FFF FF80 FFFF
345 msp430f6433 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 27FFF FF80 FFFF
346 msp430f6435 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 47FFF FF80 FFFF
347 msp430f6436 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 27FFF FF80 FFFF
348 msp430f6438 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 47FFF FF80 FFFF
349 msp430f6630 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 27FFF FF80 FFFF
350 msp430f6631 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 37FFF FF80 FFFF
351 msp430f6632 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 47FFF FF80 FFFF
352 msp430f6633 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 27FFF FF80 FFFF
353 msp430f6634 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 37FFF FF80 FFFF
354 msp430f6635 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 47FFF FF80 FFFF
355 msp430f6636 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 27FFF FF80 FFFF
356 msp430f6637 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 37FFF FF80 FFFF
357 msp430f6638 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 47FFF FF80 FFFF
358 msp430f5358 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 63FF F8000 FBFFF 0 0 0 0 0 0 2400 FC000 FFFFF 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 67FFF FF80 FFFF
359 msp430f5359 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 63FF F0000 FBFFF 0 0 0 0 0 0 2400 FC000 FFFFF 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 87FFF FF80 FFFF
360 msp430f5658 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF F8000 FBFFF 0 0 1C00 23FF 0 0 2400 FC000 FFFFF 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 67FFF FF80 FFFF
361 msp430f5659 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF F0000 FBFFF 0 0 1C00 23FF 0 0 2400 FC000 FFFFF 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 87FFF FF80 FFFF
362 msp430f6458 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 63FF F8000 FBFFF 0 0 0 0 0 0 2400 FC000 FFFFF 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 67FFF FF80 FFFF
363 msp430f6459 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 63FF F0000 FBFFF 0 0 0 0 0 0 2400 FC000 FFFFF 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 87FFF FF80 FFFF
364 msp430f6658 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF F8000 FBFFF 0 0 1C00 23FF 0 0 2400 FC000 FFFFF 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 67FFF FF80 FFFF
365 msp430f6659 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 63FF F0000 FBFFF 0 0 1C00 23FF 0 0 2400 FC000 FFFFF 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 10000 87FFF FF80 FFFF
366 msp430fg6425 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 143FF FF80 FFFF
367 msp430fg6426 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 43FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 243FF FF80 FFFF
368 msp430fg6625 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 43FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 143FF FF80 FFFF
369 msp430fg6626 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 2400 43FF 0 0 0 0 1C00 23FF 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 243FF FF80 FFFF
370 msp430l092 0 CPU21; CPU22; CPU40 0 0 EMEX_EXTRA_SMALL_5XX 2 EXTENDED 1 80 2380 23FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1C00 60 1C5F 1C00 0 0 0 1C80 237F 0 0 1C60 1C7F
371 msp430c091 0 CPU21; CPU22; CPU40 0 0 EMEX_EXTRA_SMALL_5XX 2 EXTENDED 1 80 2380 23FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1C00 60 1C5F 1C00 0 0 0 FC80 FFDF 0 0 FFE0 FFFF
372 msp430c092 0 CPU21; CPU22; CPU40 0 0 EMEX_EXTRA_SMALL_5XX 2 EXTENDED 1 80 2380 23FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1C00 60 1C5F 1C00 0 0 0 F880 FFDF 0 0 FFE0 FFFF
373 msp430xgeneric 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 6400 FF7F 10000 463FF FF80 FFFF
374 msp430f5xx_6xxgeneric 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 6400 FF7F 10000 463FF FF80 FFFF
375 msp430fr5xx_6xxgeneric 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 6400 FF7F 10000 463FF FF80 FFFF
376 msp430fr2xx_4xxgeneric 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 6400 FF7F 10000 463FF FF80 FFFF
377 msp430fr57xxgeneric 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 6400 FF7F 10000 463FF FF80 FFFF
378 msp430i2xxgeneric 0 0 2 1 EMEX_LOW 2 STANDARD 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 400 13FF 1000 0 0 0 C000 FFDB 0 0 FFDC 4 FF80 FFFF
379 msp430f5131 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 E000 FF7F 0 0 FF80 FFFF
380 msp430f5151 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
381 msp430f5171 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
382 msp430f5132 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 E000 FF7F 0 0 FF80 FFFF
383 msp430f5152 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
384 msp430f5172 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
385 msp430f6720 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
386 msp430f6721 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
387 msp430f6723 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 13FFF FF80 FFFF
388 msp430f6724 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 1BFFF FF80 FFFF
389 msp430f6725 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 23FFF FF80 FFFF
390 msp430f6726 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 3BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 23FFF FF80 FFFF
391 msp430f6730 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
392 msp430f6731 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
393 msp430f6733 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 13FFF FF80 FFFF
394 msp430f6734 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 1BFFF FF80 FFFF
395 msp430f6735 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 23FFF FF80 FFFF
396 msp430f6736 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 3BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 23FFF FF80 FFFF
397 msp430f67621 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 13FFF FF80 FFFF
398 msp430f67641 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 23FFF FF80 FFFF
399 msp430f6720a 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
400 msp430f6721a 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
401 msp430f6723a 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 13FFF FF80 FFFF
402 msp430f6724a 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 1BFFF FF80 FFFF
403 msp430f6725a 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 23FFF FF80 FFFF
404 msp430f6726a 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 3BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 23FFF FF80 FFFF
405 msp430f6730a 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
406 msp430f6731a 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
407 msp430f6733a 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 13FFF FF80 FFFF
408 msp430f6734a 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 1BFFF FF80 FFFF
409 msp430f6735a 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 23FFF FF80 FFFF
410 msp430f6736a 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 3BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 23FFF FF80 FFFF
411 msp430f67621a 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 13FFF FF80 FFFF
412 msp430f67641a 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4000 FF7F 10000 23FFF FF80 FFFF
413 msp430f67451 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 2BFFF FF80 FFFF
414 msp430f67651 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 2BFFF FF80 FFFF
415 msp430f67751 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 2BFFF FF80 FFFF
416 msp430f67461 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
417 msp430f67661 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
418 msp430f67761 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
419 msp430f67471 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
420 msp430f67671 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
421 msp430f67771 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
422 msp430f67481 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
423 msp430f67681 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
424 msp430f67781 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
425 msp430f67491 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
426 msp430f67691 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
427 msp430f67791 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
428 msp430f6745 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 2BFFF FF80 FFFF
429 msp430f6765 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 2BFFF FF80 FFFF
430 msp430f6775 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 2BFFF FF80 FFFF
431 msp430f6746 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
432 msp430f6766 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
433 msp430f6776 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
434 msp430f6747 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
435 msp430f6767 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
436 msp430f6777 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
437 msp430f6748 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
438 msp430f6768 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
439 msp430f6778 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
440 msp430f6749 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
441 msp430f6769 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
442 msp430f6779 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
443 msp430f67451a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 2BFFF FF80 FFFF
444 msp430f67651a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 2BFFF FF80 FFFF
445 msp430f67751a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 2BFFF FF80 FFFF
446 msp430f67461a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
447 msp430f67661a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
448 msp430f67761a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
449 msp430f67471a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
450 msp430f67671a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
451 msp430f67771a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
452 msp430f67481a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
453 msp430f67681a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
454 msp430f67781a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
455 msp430f67491a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
456 msp430f67691a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
457 msp430f67791a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
458 msp430f6745a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 2BFFF FF80 FFFF
459 msp430f6765a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 2BFFF FF80 FFFF
460 msp430f6775a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 2BFFF FF80 FFFF
461 msp430f6746a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
462 msp430f6766a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
463 msp430f6776a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
464 msp430f6747a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
465 msp430f6767a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
466 msp430f6777a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 4BFFF FF80 FFFF
467 msp430f6748a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
468 msp430f6768a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
469 msp430f6778a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
470 msp430f6749a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
471 msp430f6769a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
472 msp430f6779a 2 CPU21; CPU22; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 9BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 10000 8BFFF FF80 FFFF
473 msp430fr5720 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 F000 FF7F 0 0 FF80 10 FF90 FFFF
474 msp430fr5721 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 F000 FF7F 0 0 FF80 10 FF90 FFFF
475 msp430fr5722 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 E000 FF7F 0 0 FF80 10 FF90 FFFF
476 msp430fr5723 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 E000 FF7F 0 0 FF80 10 FF90 FFFF
477 msp430fr5724 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 E000 FF7F 0 0 FF80 10 FF90 FFFF
478 msp430fr5725 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 E000 FF7F 0 0 FF80 10 FF90 FFFF
479 msp430fr5726 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 C200 FF7F 0 0 FF80 10 FF90 FFFF
480 msp430fr5727 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 C200 FF7F 0 0 FF80 10 FF90 FFFF
481 msp430fr5728 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 C200 FF7F 0 0 FF80 10 FF90 FFFF
482 msp430fr5729 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 C200 FF7F 0 0 FF80 10 FF90 FFFF
483 msp430fr5730 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 F000 FF7F 0 0 FF80 10 FF90 FFFF
484 msp430fr5731 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 F000 FF7F 0 0 FF80 10 FF90 FFFF
485 msp430fr5732 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 E000 FF7F 0 0 FF80 10 FF90 FFFF
486 msp430fr5733 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 E000 FF7F 0 0 FF80 10 FF90 FFFF
487 msp430fr5734 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 E000 FF7F 0 0 FF80 10 FF90 FFFF
488 msp430fr5735 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 E000 FF7F 0 0 FF80 10 FF90 FFFF
489 msp430fr5736 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 C200 FF7F 0 0 FF80 10 FF90 FFFF
490 msp430fr5737 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 C200 FF7F 0 0 FF80 10 FF90 FFFF
491 msp430fr5738 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 C200 FF7F 0 0 FF80 10 FF90 FFFF
492 msp430fr5739 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 18FF 1880 1800 0 0 C200 FF7F 0 0 FF80 10 FF90 FFFF
493 msp430g2211 0 0 0 1 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDF 0 0 FFE0 FFFF
494 msp430g2201 0 0 0 1 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDF 0 0 FFE0 FFFF
495 msp430g2111 0 0 0 1 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 FC00 FFDF 0 0 FFE0 FFFF
496 msp430g2101 0 0 0 1 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 FC00 FFDF 0 0 FFE0 FFFF
497 msp430g2001 0 0 0 1 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 FE00 FFDF 0 0 FFE0 FFFF
498 msp430g2231 0 0 0 1 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDF 0 0 FFE0 FFFF
499 msp430g2221 0 0 0 1 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDF 0 0 FFE0 FFFF
500 msp430g2131 0 0 0 1 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 FC00 FFDF 0 0 FFE0 FFFF
501 msp430g2121 0 0 0 1 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 FC00 FFDF 0 0 FFE0 FFFF
502 msp430afe221 0 0 2 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F000 FFDF 0 0 FFE0 FFFF
503 msp430afe231 0 0 2 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDF 0 0 FFE0 FFFF
504 msp430afe251 0 0 2 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 C000 FFDF 0 0 FFE0 FFFF
505 msp430afe222 0 0 2 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F000 FFDF 0 0 FFE0 FFFF
506 msp430afe232 0 0 2 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDF 0 0 FFE0 FFFF
507 msp430afe252 0 0 2 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 C000 FFDF 0 0 FFE0 FFFF
508 msp430afe223 0 0 2 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F000 FFDF 0 0 FFE0 FFFF
509 msp430afe233 0 0 2 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDF 0 0 FFE0 FFFF
510 msp430afe253 0 0 2 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 C000 FFDF 0 0 FFE0 FFFF
511 msp430g2102 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 FC00 FFDF 0 0 FFE0 FFFF
512 msp430g2202 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDF 0 0 FFE0 FFFF
513 msp430g2302 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F000 FFDF 0 0 FFE0 FFFF
514 msp430g2402 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDF 0 0 FFE0 FFFF
515 msp430g2132 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 FC00 FFDF 0 0 FFE0 FFFF
516 msp430g2232 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDF 0 0 FFE0 FFFF
517 msp430g2332 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F000 FFDF 0 0 FFE0 FFFF
518 msp430g2432 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDF 0 0 FFE0 FFFF
519 msp430g2112 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 FC00 FFDF 0 0 FFE0 FFFF
520 msp430g2212 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDF 0 0 FFE0 FFFF
521 msp430g2312 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F000 FFDF 0 0 FFE0 FFFF
522 msp430g2412 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDF 0 0 FFE0 FFFF
523 msp430g2152 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 FC00 FFDF 0 0 FFE0 FFFF
524 msp430g2252 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDF 0 0 FFE0 FFFF
525 msp430g2352 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F000 FFDF 0 0 FFE0 FFFF
526 msp430g2452 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDF 0 0 FFE0 FFFF
527 msp430g2113 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 FC00 FFDD 0 0 FFDE 2 FFE0 FFFF
528 msp430g2213 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDD 0 0 FFDE 2 FFE0 FFFF
529 msp430g2313 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F000 FFDD 0 0 FFDE 2 FFE0 FFFF
530 msp430g2413 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDD 0 0 FFDE 2 FFE0 FFFF
531 msp430g2513 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 C000 FFDD 0 0 FFDE 2 FFE0 FFFF
532 msp430g2153 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 FC00 FFDD 0 0 FFDE 2 FFE0 FFFF
533 msp430g2253 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDD 0 0 FFDE 2 FFE0 FFFF
534 msp430g2353 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F000 FFDD 0 0 FFDE 2 FFE0 FFFF
535 msp430g2453 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDD 0 0 FFDE 2 FFE0 FFFF
536 msp430g2553 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 C000 FFDD 0 0 FFDE 2 FFE0 FFFF
537 msp430g2203 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDD 0 0 FFDE 2 FFE0 FFFF
538 msp430g2303 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F000 FFDD 0 0 FFDE 2 FFE0 FFFF
539 msp430g2403 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDD 0 0 FFDE 2 FFE0 FFFF
540 msp430g2233 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDD 0 0 FFDE 2 FFE0 FFFF
541 msp430g2333 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 02FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F000 FFDD 0 0 FFDE 2 FFE0 FFFF
542 msp430g2433 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDD 0 0 FFDE 2 FFE0 FFFF
543 msp430g2533 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 C000 FFDD 0 0 FFDE 2 FFE0 FFFF
544 msp430tch5e 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 C000 FFDD 0 0 FFDE 2 FFE0 FFFF
545 msp430g2444 0 CPU19 0 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 E000 FFDD 0 0 FFDE 2 FFE0 FFFF
546 msp430g2544 0 CPU19 0 1 EMEX_LOW 2 STANDARD 0 80 200 03FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 C000 FFDD 0 0 FFDE 2 FFE0 FFFF
547 msp430g2744 0 CPU19 0 1 EMEX_LOW 2 STANDARD 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 8000 FFDD 0 0 FFDE 2 FFE0 FFFF
548 msp430g2755 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 8000 FFDD 0 0 FFDE 2 FFE0 FFFF
549 msp430g2855 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 4000 FFDD 0 0 FFDE 2 FFE0 FFFF
550 msp430g2955 0 0 0 1 EMEX_LOW 2 STANDARD 0 80 1100 20FF 0 0 0 0 0 0 0 0 1100 200 9FF 0 0 0 1000 40 10FF 10C0 1080 1040 1000 2100 FFDD 0 0 FFDE 2 FFE0 FFFF
551 msp430g2230 0 0 0 1 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDF 0 0 FFE0 FFFF
552 msp430g2210 0 0 0 1 EMEX_LOW 2 STANDARD 0 50 200 027F 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 40 10FF 10C0 1080 1040 1000 F800 FFDF 0 0 FFE0 FFFF
553 msp430bt5190 2 CPU21; CPU22; CPU23; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 5C00 FF7F 10000 45BFF FF80 FFFF
554 msp430fr5857 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 10 FF90 FFFF
555 msp430fr5858 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 0 0 FF80 10 FF90 FFFF
556 msp430fr5859 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
557 msp430fr5847 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 10 FF90 FFFF
558 msp430fr58471 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 10 FF90 FFFF
559 msp430fr5848 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 0 0 FF80 10 FF90 FFFF
560 msp430fr5849 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
561 msp430fr5867 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 10 FF90 FFFF
562 msp430fr58671 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 10 FF90 FFFF
563 msp430fr5868 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 0 0 FF80 10 FF90 FFFF
564 msp430fr5869 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
565 msp430fr5957 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 10 FF90 FFFF
566 msp430fr5958 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 0 0 FF80 10 FF90 FFFF
567 msp430fr5959 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
568 msp430fr5947 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 10 FF90 FFFF
569 msp430fr59471 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 10 FF90 FFFF
570 msp430fr5948 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 0 0 FF80 10 FF90 FFFF
571 msp430fr5949 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
572 msp430fr5967 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 10 FF90 FFFF
573 msp430fr5968 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 0 0 FF80 10 FF90 FFFF
574 msp430fr5969 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
575 msp430fr59691 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
576 msp430i2020 0 0 2 1 EMEX_LOW 2 STANDARD 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 400 13FF 1000 0 0 0 C000 FFDB 0 0 FFDC 4 FFE0 FFFF
577 msp430i2021 0 0 2 1 EMEX_LOW 2 STANDARD 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 400 13FF 1000 0 0 0 8000 FFDB 0 0 FFDC 4 FFE0 FFFF
578 msp430i2030 0 0 2 1 EMEX_LOW 2 STANDARD 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 400 13FF 1000 0 0 0 C000 FFDB 0 0 FFDC 4 FFE0 FFFF
579 msp430i2031 0 0 2 1 EMEX_LOW 2 STANDARD 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 400 13FF 1000 0 0 0 8000 FFDB 0 0 FFDC 4 FFE0 FFFF
580 msp430i2040 0 0 2 1 EMEX_LOW 2 STANDARD 0 80 200 05FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 400 13FF 1000 0 0 0 C000 FFDB 0 0 FFDC 4 FFE0 FFFF
581 msp430i2041 0 0 2 1 EMEX_LOW 2 STANDARD 0 80 200 09FF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1000 400 13FF 1000 0 0 0 8000 FFDB 0 0 FFDC 4 FFE0 FFFF
582 rf430frl152h 0 CPU21; CPU22; CPU40 0 0 EMEX_EXTRA_SMALL_5XX 2 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F840 FFCF 0 0 FFD0 6 FFE0 FFFF
583 rf430frl153h 0 CPU21; CPU22; CPU40 0 0 EMEX_EXTRA_SMALL_5XX 2 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F840 FFCF 0 0 FFD0 6 FFE0 FFFF
584 rf430frl154h 0 CPU21; CPU22; CPU40 0 0 EMEX_EXTRA_SMALL_5XX 2 EXTENDED 1 80 1C00 2BFF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F840 FFCF 0 0 FFD0 6 FFE0 FFFF
585 rf430frl152h_rom 0 CPU21; CPU22; CPU40 0 0 EMEX_EXTRA_SMALL_5XX 2 EXTENDED 1 80 1C00 1DFF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F840 FFCF 0 0 FFD0 6 FFE0 FFFF
586 rf430frl153h_rom 0 CPU21; CPU22; CPU40 0 0 EMEX_EXTRA_SMALL_5XX 2 EXTENDED 1 80 1C00 1DFF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F840 FFCF 0 0 FFD0 6 FFE0 FFFF
587 rf430frl154h_rom 0 CPU21; CPU22; CPU40 0 0 EMEX_EXTRA_SMALL_5XX 2 EXTENDED 1 80 1C00 1DFF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 F840 FFCF 0 0 FFD0 6 FFE0 FFFF
588 rf430f5175 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 FFFF
589 rf430f5155 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
590 rf430f5144 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 80 1C00 1FFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 C000 FF7F 0 0 FF80 FFFF
591 msp430fr69271 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
592 msp430fr68791 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 23FFF FF80 10 FF90 FFFF
593 msp430fr69791 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 23FFF FF80 10 FF90 FFFF
594 msp430fr6927 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
595 msp430fr6928 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 1BFFF FF80 10 FF90 FFFF
596 msp430fr6877 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
597 msp430fr6977 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
598 msp430fr6879 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 23FFF FF80 10 FF90 FFFF
599 msp430fr6979 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 23FFF FF80 10 FF90 FFFF
600 msp430fr58891 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 23FFF FF80 10 FF90 FFFF
601 msp430fr68891 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 23FFF FF80 10 FF90 FFFF
602 msp430fr59891 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 23FFF FF80 10 FF90 FFFF
603 msp430fr69891 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 23FFF FF80 10 FF90 FFFF
604 msp430fr5887 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
605 msp430fr5888 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 1BFFF FF80 10 FF90 FFFF
606 msp430fr5889 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 23FFF FF80 10 FF90 FFFF
607 msp430fr6887 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
608 msp430fr6888 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 1BFFF FF80 10 FF90 FFFF
609 msp430fr6889 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 23FFF FF80 10 FF90 FFFF
610 msp430fr5986 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 0 0 FF80 10 FF90 FFFF
611 msp430fr5987 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
612 msp430fr5988 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 1BFFF FF80 10 FF90 FFFF
613 msp430fr5989 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 23FFF FF80 10 FF90 FFFF
614 msp430fr6987 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
615 msp430fr6988 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 1BFFF FF80 10 FF90 FFFF
616 msp430fr6989 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 23FFF FF80 10 FF90 FFFF
617 msp430fr5922 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
618 msp430fr5870 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 10 FF90 FFFF
619 msp430fr5970 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 10 FF90 FFFF
620 msp430fr5872 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
621 msp430fr5972 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
622 msp430fr6820 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 10 FF90 FFFF
623 msp430fr6920 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 10 FF90 FFFF
624 msp430fr6822 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
625 msp430fr6922 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
626 msp430fr6870 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 10 FF90 FFFF
627 msp430fr6970 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 8000 FF7F 0 0 FF80 10 FF90 FFFF
628 msp430fr6872 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
629 msp430fr6972 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
630 msp430fr59221 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
631 msp430fr58721 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
632 msp430fr59721 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
633 msp430fr68221 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
634 msp430fr69221 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
635 msp430fr68721 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
636 msp430fr69721 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 23FF 0 0 6 001F 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 4400 FF7F 10000 13FFF FF80 10 FF90 FFFF
637 msp430sl5438a 2 CPU21; CPU22; CPU23; CPU30; CPU40 8 2 EMEX_LARGE_5XX 8 EXTENDED 2 160 1C00 5BFF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 5C00 FF7F 10000 45BFF FF80 FFFF
638 msp430fr4131 2 CPU21; CPU22; CPU40 0 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 21FF 0 0 0 0 0 0 0 0 0 0 0 1000 400 13FF 1800 200 19FF 1800 0 0 0 F000 FF7F 0 0 FF80 8 FF88 FFFF
639 msp430fr4132 2 CPU21; CPU22; CPU40 0 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 400 13FF 1800 200 19FF 1800 0 0 0 E000 FF7F 0 0 FF80 8 FF88 FFFF
640 msp430fr4133 2 CPU21; CPU22; CPU40 0 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 27FF 0 0 0 0 0 0 0 0 0 0 0 1000 400 13FF 1800 200 19FF 1800 0 0 0 C400 FF7F 0 0 FF80 8 FF88 FFFF
641 msp430fr2032 2 CPU21; CPU22; CPU40 0 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 400 13FF 1800 200 19FF 1800 0 0 0 E000 FF7F 0 0 FF80 8 FF88 FFFF
642 msp430fr2033 2 CPU21; CPU22; CPU40 0 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 27FF 0 0 0 0 0 0 0 0 0 0 0 1000 400 13FF 1800 200 19FF 1800 0 0 0 C400 FF7F 0 0 FF80 8 FF88 FFFF
643 msp430fr2110 2 CPU40 0 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 400 13FF 0 0 0 0 0 0 0 F800 FF7F 0 0 FF80 8 FF88 FFFF
644 msp430fr2111 2 CPU40 0 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 400 13FF 0 0 0 0 0 0 0 F100 FF7F 0 0 FF80 8 FF88 FFFF
645 msp430fr2310 2 CPU40 0 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 800 17FF 0 0 0 0 0 0 0 F800 FF7F 0 0 FF80 8 FF88 FFFF
646 msp430fr2311 2 CPU40 0 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 800 17FF 0 0 0 0 0 0 0 F100 FF7F 0 0 FF80 8 FF88 FFFF
647 msp430fr2433 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 2FFF 0 0 0 0 0 0 0 0 0 0 0 1000 800 17FF 1800 200 19FF 1800 0 0 0 C400 FF7F 0 0 FF80 8 FF88 FFFF
648 msp430fr2532 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 23FF 0 0 0 0 0 0 0 0 0 0 0 1000 800 17FF 1800 200 19FF 1800 0 0 0 E000 FF7F 0 0 FF80 8 FF88 FFFF
649 msp430fr2533 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 27FF 0 0 0 0 0 0 0 0 0 0 0 1000 800 17FF 1800 200 19FF 1800 0 0 0 C400 FF7F 0 0 FF80 8 FF88 FFFF
650 msp430fr2632 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 27FF 0 0 0 0 0 0 0 0 0 0 0 1000 800 17FF 1800 200 19FF 1800 0 0 0 E000 FF7F 0 0 FF80 8 FF88 FFFF
651 msp430fr2633 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 2FFF 0 0 0 0 0 0 0 0 0 0 0 1000 800 17FF 1800 200 19FF 1800 0 0 0 C400 FF7F 0 0 FF80 8 FF88 FFFF
652 msp430f5252 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 63FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 A400 FF7F 10000 2A3FF FF80 FFFF
653 msp430f5253 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 63FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 A400 FF7F 10000 2A3FF FF80 FFFF
654 msp430f5254 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 A3FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 A400 FF7F 10000 2A3FF FF80 FFFF
655 msp430f5255 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 A3FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 A400 FF7F 10000 2A3FF FF80 FFFF
656 msp430f5256 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 63FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 A400 FF7F 10000 2A3FF FF80 FFFF
657 msp430f5257 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 63FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 A400 FF7F 10000 2A3FF FF80 FFFF
658 msp430f5258 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 A3FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 A400 FF7F 10000 2A3FF FF80 FFFF
659 msp430f5259 2 CPU21; CPU22; CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2400 A3FF 0 0 0 0 0 0 0 0 0 0 0 1000 200 17FF 1800 80 19FF 1980 1900 1880 1800 A400 FF7F 10000 2A3FF FF80 FFFF
660 msp430fr5962 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 3BFF 0 0 A 001F 0 0 0 0 0 0 0 1000 800 17FF 1800 200 19FF 1980 1900 1880 1800 4000 FF7F 10000 23FFF FF80 10 FF90 FFFF
661 msp430fr5964 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 3BFF 0 0 A 001F 0 0 0 0 0 0 0 1000 800 17FF 1800 200 19FF 1980 1900 1880 1800 4000 FF7F 10000 43FFF FF80 10 FF90 FFFF
662 msp430fr5992 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 2BFF 0 0 A 001F 0 0 2C00 3BFF 0 0 0 1000 800 17FF 1800 200 19FF 1980 1900 1880 1800 4000 FF7F 10000 23FFF FF80 10 FF90 FFFF
663 msp430fr5994 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 2BFF 0 0 A 001F 0 0 2C00 3BFF 0 0 0 1000 800 17FF 1800 200 19FF 1980 1900 1880 1800 4000 FF7F 10000 43FFF FF80 10 FF90 FFFF
664 msp430fr59941 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 2BFF 0 0 A 001F 0 0 2C00 3BFF 0 0 0 1000 800 17FF 1800 200 19FF 1980 1900 1880 1800 4000 FF7F 10000 43FFF FF80 10 FF90 FFFF
665 msp430fr2000 2 CPU40 0 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 21FF 0 0 0 0 0 0 0 0 0 0 0 1000 400 13FF 0 0 0 0 0 0 0 FE00 FF7F 0 0 FF80 8 FF88 FFFF
666 msp430fr2100 2 CPU40 0 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 21FF 0 0 0 0 0 0 0 0 0 0 0 1000 400 13FF 0 0 0 0 0 0 0 FC00 FF7F 0 0 FF80 8 FF88 FFFF
667 msp430fr2353 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 27FF 0 0 6 001F 0 0 0 0 0 0 0 1000 800 17FF 1800 200 19FF 0 0 0 0 C000 FF7F 0 0 FF80 22 FFA2 FFFF
668 msp430fr2355 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 2FFF 0 0 6 001F 0 0 0 0 0 0 0 1000 800 17FF 1800 200 19FF 0 0 0 0 8000 FF7F 0 0 FF80 22 FFA2 FFFF
669 msp430fr2153 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 27FF 0 0 6 001F 0 0 0 0 0 0 0 1000 800 17FF 1800 200 19FF 0 0 0 0 C000 FF7F 0 0 FF80 22 FFA2 FFFF
670 msp430fr2155 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 2FFF 0 0 6 001F 0 0 0 0 0 0 0 1000 800 17FF 1800 200 19FF 0 0 0 0 8000 FF7F 0 0 FF80 22 FFA2 FFFF
671 msp430fr2422 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 27FF 0 0 0 0 0 0 0 0 0 0 0 1000 800 17FF 1800 100 18FF 0 0 0 0 E300 FF7F 0 0 FF80 8 FF88 FFFF
672 msp430fr2522 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 27FF 0 0 0 0 0 0 0 0 0 0 0 1000 800 17FF 1800 100 18FF 0 0 0 0 E300 FF7F 0 0 FF80 8 FF88 FFFF
673 msp430fr2512 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 27FF 0 0 0 0 0 0 0 0 0 0 0 1000 800 17FF 1800 100 18FF 0 0 0 0 E300 FF7F 0 0 FF80 8 FF88 FFFF
674 msp430fr2676 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 3FFF 0 0 6 001F 0 0 0 0 0 0 0 1000 800 17FF 1800 200 19FF 0 0 0 0 8000 FF7F 10000 17FFF FF80 22 FFA2 FFFF
675 msp430fr2675 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 37FF 0 0 6 001F 0 0 0 0 0 0 0 1000 800 17FF 1800 200 19FF 0 0 0 0 8000 FF7F 0 0 FF80 22 FFA2 FFFF
676 msp430fr2476 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 3FFF 0 0 6 001F 0 0 0 0 0 0 0 1000 800 17FF 1800 200 19FF 0 0 0 0 8000 FF7F 10000 17FFF FF80 22 FFA2 FFFF
677 msp430fr2475 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 2000 2FFF 0 0 6 001F 0 0 0 0 0 0 0 1000 800 17FF 1800 200 19FF 0 0 0 0 8000 FF7F 0 0 FF80 22 FFA2 FFFF
678 msp430fr50431 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 2BFF 0 0 A 001F 0 0 5000 5FFF 0 0 0 1000 800 17FF 0 0 0 0 0 0 0 6000 FF7F 10000 15FFF FF80 10 FF90 FFFF
679 msp430fr6041 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 2BFF 0 0 A 001F 0 0 5000 5FFF 0 0 0 1000 800 17FF 0 0 0 0 0 0 0 8000 FF7F 0 0 FF80 10 FF90 FFFF
680 msp430fr6043 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 2BFF 0 0 A 001F 0 0 5000 5FFF 0 0 0 1000 800 17FF 0 0 0 0 0 0 0 6000 FF7F 10000 15FFF FF80 10 FF90 FFFF
681 msp430fr5041 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 2BFF 0 0 A 001F 0 0 5000 5FFF 0 0 0 1000 800 17FF 0 0 0 0 0 0 0 8000 FF7F 0 0 FF80 10 FF90 FFFF
682 msp430fr5043 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 2BFF 0 0 A 001F 0 0 5000 5FFF 0 0 0 1000 800 17FF 0 0 0 0 0 0 0 6000 FF7F 10000 15FFF FF80 10 FF90 FFFF
683 msp430fr60431 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 2BFF 0 0 A 001F 0 0 5000 5FFF 0 0 0 1000 800 17FF 0 0 0 0 0 0 0 6000 FF7F 10000 15FFF FF80 10 FF90 FFFF
684 msp430fr6037 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 2BFF 0 0 A 001F 0 0 2C00 3BFF 0 0 0 1000 800 17FF 0 0 0 0 0 0 0 4000 FF7F 10000 43FFF FF80 10 FF90 FFFF
685 msp430fr6035 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 2BFF 0 0 A 001F 0 0 2C00 3BFF 0 0 0 1000 800 17FF 0 0 0 0 0 0 0 4000 FF7F 10000 23FFF FF80 10 FF90 FFFF
686 msp430fr60471 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 2BFF 0 0 A 001F 0 0 2C00 3BFF 0 0 0 1000 800 17FF 0 0 0 0 0 0 0 4000 FF7F 10000 43FFF FF80 10 FF90 FFFF
687 msp430fr60371 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 2BFF 0 0 A 001F 0 0 2C00 3BFF 0 0 0 1000 800 17FF 0 0 0 0 0 0 0 4000 FF7F 10000 43FFF FF80 10 FF90 FFFF
688 msp430fr6045 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 2BFF 0 0 A 001F 0 0 2C00 3BFF 0 0 0 1000 800 17FF 0 0 0 0 0 0 0 4000 FF7F 10000 23FFF FF80 10 FF90 FFFF
689 msp430fr6047 2 CPU40 8 2 EMEX_SMALL_5XX 3 EXTENDED 1 160 1C00 2BFF 0 0 A 001F 0 0 2C00 3BFF 0 0 0 1000 800 17FF 0 0 0 0 0 0 0 4000 FF7F 10000 43FFF FF80 10 FF90 FFFF

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cpu/msp430_common/vendor/msp430-gcc-support-files/include/in430.h vendored Normal file
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/*******************************************************************************
* in430.h -
*
* Copyright (C) 2003-2019 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
/* 1.208 */
#ifndef __IN430_H__
#define __IN430_H__
/* Definitions for projects using the GNU C/C++ compiler */
#if !defined(__ASSEMBLER__)
/* Definitions of things which are intrinsics with IAR and CCS, but which don't
appear to be intrinsics with the GCC compiler */
/* The data type used to hold interrupt state */
typedef unsigned int __istate_t;
#define _no_operation() __asm__ __volatile__ ("nop")
#define _get_interrupt_state() \
({ \
unsigned int __x; \
__asm__ __volatile__( \
"mov SR, %0" \
: "=r" ((unsigned int) __x) \
:); \
__x; \
})
#if defined(__MSP430_HAS_MSP430XV2_CPU__) || defined(__MSP430_HAS_MSP430X_CPU__)
#define _set_interrupt_state(x) \
({ \
__asm__ __volatile__ ("nop { mov %0, SR { nop" \
: : "ri"((unsigned int) x) \
);\
})
#define _enable_interrupts() __asm__ __volatile__ ("nop { eint { nop")
#define _bis_SR_register(x) \
__asm__ __volatile__ ("nop { bis.w %0, SR { nop" \
: : "ri"((unsigned int) x) \
)
#else
#define _set_interrupt_state(x) \
({ \
__asm__ __volatile__ ("mov %0, SR { nop" \
: : "ri"((unsigned int) x) \
);\
})
#define _enable_interrupts() __asm__ __volatile__ ("eint")
#define _bis_SR_register(x) \
__asm__ __volatile__ ("bis.w %0, SR" \
: : "ri"((unsigned int) x) \
)
#endif
#define _disable_interrupts() __asm__ __volatile__ ("dint { nop")
#define _bic_SR_register(x) \
__asm__ __volatile__ ("bic.w %0, SR { nop" \
: : "ri"((unsigned int) x) \
)
#define _get_SR_register() \
({ \
unsigned int __x; \
__asm__ __volatile__( \
"mov SR, %0" \
: "=r" ((unsigned int) __x) \
:); \
__x; \
})
#define _swap_bytes(x) \
({ \
unsigned int __dst = x; \
__asm__ __volatile__( \
"swpb %0" \
: "+r" ((unsigned int) __dst) \
:); \
__dst; \
})
/* Alternative names for GCC built-ins */
#define _bic_SR_register_on_exit(x) __bic_SR_register_on_exit(x)
#define _bis_SR_register_on_exit(x) __bis_SR_register_on_exit(x)
/* Additional intrinsics provided for IAR/CCS compatibility */
#define _bcd_add_short(x,y) \
({ \
unsigned short __z = ((unsigned short) y); \
__asm__ __volatile__( \
"clrc \n\t" \
"dadd.w %1, %0" \
: "+r" ((unsigned short) __z) \
: "ri" ((unsigned short) x) \
); \
__z; \
})
#define __bcd_add_short(x,y) _bcd_add_short(x,y)
#define _bcd_add_long(x,y) \
({ \
unsigned long __z = ((unsigned long) y); \
__asm__ __volatile__( \
"clrc \n\t" \
"dadd.w %L1, %L0 \n\t" \
"dadd.w %H1, %H0" \
: "+r" ((unsigned long) __z) \
: "ri" ((unsigned long) x) \
); \
__z; \
})
#define __bcd_add_long(x,y) _bcd_add_long(x,y)
#define _get_SP_register() \
({ \
unsigned int __x; \
__asm__ __volatile__( \
"mov SP, %0" \
: "=r" ((unsigned int) __x) \
:); \
__x; \
})
#define __get_SP_register() _get_SP_register()
#define _set_SP_register(x) \
({ \
__asm__ __volatile__ ("mov %0, SP" \
: : "ri"((unsigned int) x) \
);\
})
#define __set_SP_register(x) _set_SP_register(x)
#define _data16_write_addr(addr,src) \
({ \
unsigned long __src = src; \
__asm__ __volatile__ ( \
"movx.a %1, 0(%0)" \
: : "r"((unsigned int) addr), "m"((unsigned long) __src) \
); \
})
#define __data16_write_addr(addr,src) _data16_write_addr(addr,src)
#define _data16_read_addr(addr) \
({ \
unsigned long __dst; \
__asm__ __volatile__ ( \
"movx.a @%1, %0" \
: "=m"((unsigned long) __dst) \
: "r"((unsigned int) addr) \
); \
__dst; \
})
#define __data16_read_addr(addr) _data16_read_addr(addr)
#define _data20_write_char(addr,src) \
({ \
unsigned int __tmp; \
unsigned long __addr = addr; \
__asm__ __volatile__ ( \
"movx.a %1, %0 \n\t" \
"mov.b %2, 0(%0)" \
: "=&r"((unsigned int) __tmp) \
: "m"((unsigned long) __addr), "ri"((char) src) \
); \
})
#define __data20_write_char(addr,src) _data20_write_char(addr,src)
#define _data20_read_char(addr) \
({ \
char __dst; \
unsigned int __tmp; \
unsigned long __addr = addr; \
__asm__ __volatile__ ( \
"movx.a %2, %1 \n\t" \
"mov.b 0(%1), %0" \
: "=r"((char) __dst), "=&r"((unsigned int) __tmp) \
: "m"((unsigned long) __addr) \
); \
__dst ; \
})
#define __data20_read_char(addr) _data20_read_char(addr)
#define _data20_write_short(addr,src) \
({ \
unsigned int __tmp; \
unsigned long __addr = addr; \
__asm__ __volatile__ ( \
"movx.a %1, %0 \n\t" \
"mov.w %2, 0(%0)" \
: "=&r"((unsigned int) __tmp) \
: "m"((unsigned long) __addr), "ri"((short) src) \
); \
})
#define __data20_write_short(addr,src) _data20_write_short(addr,src)
#define _data20_read_short(addr) \
({ \
short __dst; \
unsigned int __tmp; \
unsigned long __addr = addr; \
__asm__ __volatile__ ( \
"movx.a %2, %1 \n\t" \
"mov.w 0(%1), %0" \
: "=r"((short) __dst), "=&r"((unsigned int) __tmp) \
: "m"((unsigned long) __addr) \
); \
__dst ; \
})
#define __data20_read_short(addr) _data20_read_short(addr)
#define _data20_write_long(addr,src) \
({ \
unsigned int __tmp; \
unsigned long __addr = addr; \
__asm__ __volatile__ ( \
"movx.a %1, %0 \n\t" \
"mov.w %L2, 0(%0) \n\t" \
"mov.w %H2, 2(%0)" \
: "=&r"((unsigned int) __tmp) \
: "m"((unsigned long) __addr), "ri"((long) src) \
); \
})
#define __data20_write_long(addr,src) _data20_write_long(addr,src)
#define _data20_read_long(addr) \
({ \
long __dst; \
unsigned int __tmp; \
unsigned long __addr = addr; \
__asm__ __volatile__ ( \
"movx.a %2, %1 \n\t" \
"mov.w 0(%1), %L0 \n\t" \
"mov.w 2(%1), %H0" \
: "=r"((long) __dst), "=&r"((unsigned int) __tmp) \
: "m"((unsigned long) __addr) \
); \
__dst ; \
})
#define __data20_read_long(addr) _data20_read_long(addr)
#define _low_power_mode_0() _bis_SR_register(0x18)
#define _low_power_mode_1() _bis_SR_register(0x58)
#define _low_power_mode_2() _bis_SR_register(0x98)
#define _low_power_mode_3() _bis_SR_register(0xD8)
#define _low_power_mode_4() _bis_SR_register(0xF8)
#define _low_power_mode_off_on_exit() _bic_SR_register_on_exit(0xF0)
#define __low_power_mode_0() _low_power_mode_0()
#define __low_power_mode_1() _low_power_mode_1()
#define __low_power_mode_2() _low_power_mode_2()
#define __low_power_mode_3() _low_power_mode_3()
#define __low_power_mode_4() _low_power_mode_4()
#define __low_power_mode_off_on_exit() _low_power_mode_off_on_exit()
#define _even_in_range(x,y) (x)
#define __even_in_range(x,y) _even_in_range(x,y)
/* Define some alternative names for the intrinsics, which have been used
in the various versions of IAR and GCC */
#define __no_operation() _no_operation()
#define __get_interrupt_state() _get_interrupt_state()
#define __set_interrupt_state(x) _set_interrupt_state(x)
#define __enable_interrupt() _enable_interrupts()
#define __disable_interrupt() _disable_interrupts()
#define __bic_SR_register(x) _bic_SR_register(x)
#define __bis_SR_register(x) _bis_SR_register(x)
#define __get_SR_register() _get_SR_register()
#define __swap_bytes(x) _swap_bytes(x)
#define __nop() _no_operation()
#define __eint() _enable_interrupts()
#define __dint() _disable_interrupts()
#define _NOP() _no_operation()
#define _EINT() _enable_interrupts()
#define _DINT() _disable_interrupts()
#define _BIC_SR(x) _bic_SR_register(x)
#define _BIC_SR_IRQ(x) _bic_SR_register_on_exit(x)
#define _BIS_SR(x) _bis_SR_register(x)
#define _BIS_SR_IRQ(x) _bis_SR_register_on_exit(x)
#define _BIS_NMI_IE1(x) _bis_nmi_ie1(x)
#define _SWAP_BYTES(x) _swap_bytes(x)
#define __no_init __attribute__((noinit))
#endif /* !defined _GNU_ASSEMBLER_ */
#endif /* __IN430_H__ */

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cpu/msp430_common/vendor/msp430-gcc-support-files/include/iomacros.h vendored Normal file
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/*******************************************************************************
* iomacros.h -
*
* Copyright (C) 2003-2019 Texas Instruments Incorporated - http://www.ti.com/
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
*
* Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
/* 1.208 */
#if !defined(_IOMACROS_H_)
#define _IOMACROS_H_
#if defined(__ASSEMBLER__)
/* Definitions for assembly compilation using the GNU assembler */
#define sfrb(x,x_) x=x_
#define sfrw(x,x_) x=x_
#define sfra(x,x_) x=x_
#define sfrl(x,x_) x=x_
#define const_sfrb(x,x_) x=x_
#define const_sfrw(x,x_) x=x_
#define const_sfra(x,x_) x=x_
#define const_sfrl(x,x_) x=x_
#define sfr_b(x)
#define sfr_w(x)
#define sfr_a(x)
#define sfr_l(x)
#else
#define sfr_b(x) extern volatile unsigned char x
#define sfr_w(x) extern volatile unsigned int x
#define sfr_a(x) extern volatile unsigned long int x
#define sfr_l(x) extern volatile unsigned long int x
#define sfrb_(x,x_) extern volatile unsigned char x __asm__(#x_)
#define sfrw_(x,x_) extern volatile unsigned int x __asm__(#x_)
#define sfra_(x,x_) extern volatile unsigned long int x __asm__(#x_)
#define sfrl_(x,x_) extern volatile unsigned long int x __asm__(#x_)
#define sfrb(x,x_) sfrb_(x,x_)
#define sfrw(x,x_) sfrw_(x,x_)
#define sfra(x,x_) sfra_(x,x_)
#define sfrl(x,x_) sfrl_(x,x_)
#define const_sfrb(x,x_) const sfrb_(x,x_)
#define const_sfrw(x,x_) const sfrw_(x,x_)
#define const_sfra(x,x_) const sfra_(x,x_)
#define const_sfrl(x,x_) const sfrl_(x,x_)
#define __interrupt __attribute__((__interrupt__))
#define __interrupt_vec(vec) __attribute__((interrupt(vec)))
#endif /* defined(__ASSEMBLER__) */
#endif /* _IOMACROS_H_ */

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1361
cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1611.h vendored Normal file
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cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f1611.ld vendored Normal file
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/* ============================================================================ */
/* Copyright (c) 2019, Texas Instruments Incorporated */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* * Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* * Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* */
/* * Neither the name of Texas Instruments Incorporated nor the names of */
/* its contributors may be used to endorse or promote products derived */
/* from this software without specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ============================================================================ */
/* This file supports MSP430F1611 devices. */
/* Version: 1.208 */
/* Default linker script, for normal executables */
OUTPUT_ARCH(msp430)
ENTRY(_start)
MEMORY {
SFR : ORIGIN = 0x0000, LENGTH = 0x0010 /* END=0x0010, size 16 */
RAM : ORIGIN = 0x1100, LENGTH = 0x2800 /* END=0x38FF, size 10240 */
RAM_MIRROR : ORIGIN = 0x0200, LENGTH = 0x0800
INFOMEM : ORIGIN = 0x1000, LENGTH = 0x0100 /* END=0x10FF, size 256 as 2 128-byte segments */
INFOA : ORIGIN = 0x1080, LENGTH = 0x0080 /* END=0x10FF, size 128 */
INFOB : ORIGIN = 0x1000, LENGTH = 0x0080 /* END=0x107F, size 128 */
ROM (rx) : ORIGIN = 0x4000, LENGTH = 0xBFE0 /* END=0xFFDF, size 49120 */
VECT1 : ORIGIN = 0xFFE0, LENGTH = 0x0002
VECT2 : ORIGIN = 0xFFE2, LENGTH = 0x0002
VECT3 : ORIGIN = 0xFFE4, LENGTH = 0x0002
VECT4 : ORIGIN = 0xFFE6, LENGTH = 0x0002
VECT5 : ORIGIN = 0xFFE8, LENGTH = 0x0002
VECT6 : ORIGIN = 0xFFEA, LENGTH = 0x0002
VECT7 : ORIGIN = 0xFFEC, LENGTH = 0x0002
VECT8 : ORIGIN = 0xFFEE, LENGTH = 0x0002
VECT9 : ORIGIN = 0xFFF0, LENGTH = 0x0002
VECT10 : ORIGIN = 0xFFF2, LENGTH = 0x0002
VECT11 : ORIGIN = 0xFFF4, LENGTH = 0x0002
VECT12 : ORIGIN = 0xFFF6, LENGTH = 0x0002
VECT13 : ORIGIN = 0xFFF8, LENGTH = 0x0002
VECT14 : ORIGIN = 0xFFFA, LENGTH = 0x0002
VECT15 : ORIGIN = 0xFFFC, LENGTH = 0x0002
RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002
}
SECTIONS
{
__interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) KEEP (*(__interrupt_vector_dacdma)) } > VECT1
__interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) KEEP (*(__interrupt_vector_port2)) } > VECT2
__interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) KEEP (*(__interrupt_vector_usart1tx)) } > VECT3
__interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) KEEP (*(__interrupt_vector_usart1rx)) } > VECT4
__interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) KEEP (*(__interrupt_vector_port1)) } > VECT5
__interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) KEEP (*(__interrupt_vector_timera1)) } > VECT6
__interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) KEEP (*(__interrupt_vector_timera0)) } > VECT7
__interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) KEEP (*(__interrupt_vector_adc12)) } > VECT8
__interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) KEEP (*(__interrupt_vector_usart0tx)) } > VECT9
__interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) KEEP (*(__interrupt_vector_usart0rx)) } > VECT10
__interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) KEEP (*(__interrupt_vector_wdt)) } > VECT11
__interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) KEEP (*(__interrupt_vector_comparatora)) } > VECT12
__interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) KEEP (*(__interrupt_vector_timerb1)) } > VECT13
__interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) KEEP (*(__interrupt_vector_timerb0)) } > VECT14
__interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) KEEP (*(__interrupt_vector_nmi)) } > VECT15
__reset_vector :
{
KEEP (*(__interrupt_vector_16))
KEEP (*(__interrupt_vector_reset))
KEEP (*(.resetvec))
} > RESETVEC
.rodata :
{
. = ALIGN(2);
*(.plt)
*(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
*(.rodata1)
KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
} > ROM
/* Note: This is a separate .rodata section for sections which are
read only but which older linkers treat as read-write.
This prevents older linkers from marking the entire .rodata
section as read-write. */
.rodata2 :
{
. = ALIGN(2);
PROVIDE (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE (__preinit_array_end = .);
. = ALIGN(2);
PROVIDE (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE (__init_array_end = .);
. = ALIGN(2);
PROVIDE (__fini_array_start = .);
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
PROVIDE (__fini_array_end = .);
. = ALIGN(2);
*(.eh_frame_hdr)
KEEP (*(.eh_frame))
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from from the
crtend.o file until after the sorted ctors. The .ctor section
from the crtend file contains the end of ctors marker and it
must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} > ROM
.text :
{
. = ALIGN(2);
PROVIDE (_start = .);
KEEP (*(SORT(.crt_*)))
*(.lowtext .text .stub .text.* .gnu.linkonce.t.* .text:*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.interp .hash .dynsym .dynstr .gnu.version*)
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
. = ALIGN(2);
KEEP (*(.init))
KEEP (*(.fini))
KEEP (*(.tm_clone_table))
} > ROM
.data :
{
. = ALIGN(2);
PROVIDE (__datastart = .);
KEEP (*(.jcr))
*(.data.rel.ro.local) *(.data.rel.ro*)
*(.dynamic)
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
*(.data1)
*(.got.plt) *(.got)
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
. = ALIGN(2);
*(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
. = ALIGN(2);
_edata = .;
PROVIDE (edata = .);
PROVIDE (__dataend = .);
} > RAM AT>ROM
/* Note that crt0 assumes this is a multiple of two; all the
start/stop symbols are also assumed word-aligned. */
PROVIDE(__romdatastart = LOADADDR(.data));
PROVIDE (__romdatacopysize = SIZEOF(.data));
.bss :
{
. = ALIGN(2);
PROVIDE (__bssstart = .);
*(.dynbss)
*(.sbss .sbss.*)
*(.bss .bss.* .gnu.linkonce.b.*)
. = ALIGN(2);
*(COMMON)
PROVIDE (__bssend = .);
} > RAM
PROVIDE (__bsssize = SIZEOF(.bss));
/* This section contains data that is not initialised during load
or application reset. */
.noinit (NOLOAD) :
{
. = ALIGN(2);
PROVIDE (__noinit_start = .);
*(.noinit)
. = ALIGN(2);
PROVIDE (__noinit_end = .);
end = .;
} > RAM
/* We create this section so that "end" will always be in the
RAM region (matching .stack below), even if the .bss
section is empty. */
.heap (NOLOAD) :
{
. = ALIGN(2);
__heap_start__ = .;
_end = __heap_start__;
PROVIDE (end = .);
KEEP (*(.heap))
_end = .;
PROVIDE (end = .);
/* This word is here so that the section is not empty, and thus
not discarded by the linker. The actual value does not matter
and is ignored. */
LONG(0);
__heap_end__ = .;
__HeapLimit = __heap_end__;
} > RAM
/* WARNING: Do not place anything in RAM here.
The heap section must be the last section in RAM and the stack
section must be placed at the very end of the RAM region. */
.stack (ORIGIN (RAM) + LENGTH(RAM)) :
{
PROVIDE (__stack = .);
*(.stack)
}
.infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */
.infoB : {} > INFOB
.MSP430.attributes 0 :
{
KEEP (*(.MSP430.attributes))
KEEP (*(.gnu.attributes))
KEEP (*(__TI_build_attributes))
}
/* The rest are all not normally part of the runtime image. */
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/DISCARD/ : { *(.note.GNU-stack) }
}
/****************************************************************************/
/* Include peripherals memory map */
/****************************************************************************/
INCLUDE msp430f1611_symbols.ld

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/* ============================================================================ */
/* Copyright (c) 2019, Texas Instruments Incorporated */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* * Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* * Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* */
/* * Neither the name of Texas Instruments Incorporated nor the names of */
/* its contributors may be used to endorse or promote products derived */
/* from this software without specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ============================================================================ */
/* This file supports MSP430F1611 devices. */
/* Version: 1.208 */
/************************************************************
* STANDARD BITS
************************************************************/
/************************************************************
* STATUS REGISTER BITS
************************************************************/
/************************************************************
* PERIPHERAL FILE MAP
************************************************************/
/************************************************************
* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS
************************************************************/
PROVIDE(IE1 = 0x0000);
PROVIDE(IFG1 = 0x0002);
PROVIDE(ME1 = 0x0004);
PROVIDE(IE2 = 0x0001);
PROVIDE(IFG2 = 0x0003);
PROVIDE(ME2 = 0x0005);
/************************************************************
* WATCHDOG TIMER
************************************************************/
PROVIDE(WDTCTL = 0x0120);
/************************************************************
* HARDWARE MULTIPLIER
************************************************************/
PROVIDE(MPY = 0x0130);
PROVIDE(MPYS = 0x0132);
PROVIDE(MAC = 0x0134);
PROVIDE(MACS = 0x0136);
PROVIDE(OP2 = 0x0138);
PROVIDE(RESLO = 0x013A);
PROVIDE(RESHI = 0x013C);
PROVIDE(SUMEXT = 0x013E);
/************************************************************
* DIGITAL I/O Port1/2
************************************************************/
PROVIDE(P1IN = 0x0020);
PROVIDE(P1OUT = 0x0021);
PROVIDE(P1DIR = 0x0022);
PROVIDE(P1IFG = 0x0023);
PROVIDE(P1IES = 0x0024);
PROVIDE(P1IE = 0x0025);
PROVIDE(P1SEL = 0x0026);
PROVIDE(P2IN = 0x0028);
PROVIDE(P2OUT = 0x0029);
PROVIDE(P2DIR = 0x002A);
PROVIDE(P2IFG = 0x002B);
PROVIDE(P2IES = 0x002C);
PROVIDE(P2IE = 0x002D);
PROVIDE(P2SEL = 0x002E);
/************************************************************
* DIGITAL I/O Port3/4
************************************************************/
PROVIDE(P3IN = 0x0018);
PROVIDE(P3OUT = 0x0019);
PROVIDE(P3DIR = 0x001A);
PROVIDE(P3SEL = 0x001B);
PROVIDE(P4IN = 0x001C);
PROVIDE(P4OUT = 0x001D);
PROVIDE(P4DIR = 0x001E);
PROVIDE(P4SEL = 0x001F);
/************************************************************
* DIGITAL I/O Port5/6
************************************************************/
PROVIDE(P5IN = 0x0030);
PROVIDE(P5OUT = 0x0031);
PROVIDE(P5DIR = 0x0032);
PROVIDE(P5SEL = 0x0033);
PROVIDE(P6IN = 0x0034);
PROVIDE(P6OUT = 0x0035);
PROVIDE(P6DIR = 0x0036);
PROVIDE(P6SEL = 0x0037);
/************************************************************
* USART
************************************************************/
/************************************************************
* USART 0
************************************************************/
PROVIDE(U0CTL = 0x0070);
PROVIDE(U0TCTL = 0x0071);
PROVIDE(U0RCTL = 0x0072);
PROVIDE(U0MCTL = 0x0073);
PROVIDE(U0BR0 = 0x0074);
PROVIDE(U0BR1 = 0x0075);
PROVIDE(U0RXBUF = 0x0076);
PROVIDE(U0TXBUF = 0x0077);
/************************************************************
* USART 1
************************************************************/
PROVIDE(U1CTL = 0x0078);
PROVIDE(U1TCTL = 0x0079);
PROVIDE(U1RCTL = 0x007A);
PROVIDE(U1MCTL = 0x007B);
PROVIDE(U1BR0 = 0x007C);
PROVIDE(U1BR1 = 0x007D);
PROVIDE(U1RXBUF = 0x007E);
PROVIDE(U1TXBUF = 0x007F);
/************************************************************
* USART0 I2C
************************************************************/
PROVIDE(I2CIE = 0x0050);
PROVIDE(I2CIFG = 0x0051);
PROVIDE(I2CNDAT = 0x0052);
PROVIDE(I2CTCTL = 0x0071);
PROVIDE(I2CDCTL = 0x0072);
PROVIDE(I2CPSC = 0x0073);
PROVIDE(I2CSCLH = 0x0074);
PROVIDE(I2CSCLL = 0x0075);
PROVIDE(I2CDRB = 0x0076);
PROVIDE(I2CDRW = 0x0076);
PROVIDE(I2COA = 0x0118);
PROVIDE(I2CSA = 0x011A);
PROVIDE(I2CIV = 0x011C);
/************************************************************
* Timer A3
************************************************************/
PROVIDE(TAIV = 0x012E);
PROVIDE(TACTL = 0x0160);
PROVIDE(TACCTL0 = 0x0162);
PROVIDE(TACCTL1 = 0x0164);
PROVIDE(TACCTL2 = 0x0166);
PROVIDE(TAR = 0x0170);
PROVIDE(TACCR0 = 0x0172);
PROVIDE(TACCR1 = 0x0174);
PROVIDE(TACCR2 = 0x0176);
/************************************************************
* Timer B7
************************************************************/
PROVIDE(TBIV = 0x011E);
PROVIDE(TBCTL = 0x0180);
PROVIDE(TBCCTL0 = 0x0182);
PROVIDE(TBCCTL1 = 0x0184);
PROVIDE(TBCCTL2 = 0x0186);
PROVIDE(TBCCTL3 = 0x0188);
PROVIDE(TBCCTL4 = 0x018A);
PROVIDE(TBCCTL5 = 0x018C);
PROVIDE(TBCCTL6 = 0x018E);
PROVIDE(TBR = 0x0190);
PROVIDE(TBCCR0 = 0x0192);
PROVIDE(TBCCR1 = 0x0194);
PROVIDE(TBCCR2 = 0x0196);
PROVIDE(TBCCR3 = 0x0198);
PROVIDE(TBCCR4 = 0x019A);
PROVIDE(TBCCR5 = 0x019C);
PROVIDE(TBCCR6 = 0x019E);
/************************************************************
* Basic Clock Module
************************************************************/
PROVIDE(DCOCTL = 0x0056);
PROVIDE(BCSCTL1 = 0x0057);
PROVIDE(BCSCTL2 = 0x0058);
/************************************************************
* Brown-Out, Supply Voltage Supervision (SVS)
************************************************************/
PROVIDE(SVSCTL = 0x0055);
/*************************************************************
* Flash Memory
*************************************************************/
PROVIDE(FCTL1 = 0x0128);
PROVIDE(FCTL2 = 0x012A);
PROVIDE(FCTL3 = 0x012C);
/************************************************************
* Comparator A
************************************************************/
PROVIDE(CACTL1 = 0x0059);
PROVIDE(CACTL2 = 0x005A);
PROVIDE(CAPD = 0x005B);
/************************************************************
* ADC12
************************************************************/
PROVIDE(ADC12CTL0 = 0x01A0);
PROVIDE(ADC12CTL1 = 0x01A2);
PROVIDE(ADC12IFG = 0x01A4);
PROVIDE(ADC12IE = 0x01A6);
PROVIDE(ADC12IV = 0x01A8);
PROVIDE(ADC12MEM0 = 0x0140);
PROVIDE(ADC12MEM1 = 0x0142);
PROVIDE(ADC12MEM2 = 0x0144);
PROVIDE(ADC12MEM3 = 0x0146);
PROVIDE(ADC12MEM4 = 0x0148);
PROVIDE(ADC12MEM5 = 0x014A);
PROVIDE(ADC12MEM6 = 0x014C);
PROVIDE(ADC12MEM7 = 0x014E);
PROVIDE(ADC12MEM8 = 0x0150);
PROVIDE(ADC12MEM9 = 0x0152);
PROVIDE(ADC12MEM10 = 0x0154);
PROVIDE(ADC12MEM11 = 0x0156);
PROVIDE(ADC12MEM12 = 0x0158);
PROVIDE(ADC12MEM13 = 0x015A);
PROVIDE(ADC12MEM14 = 0x015C);
PROVIDE(ADC12MEM15 = 0x015E);
PROVIDE(ADC12MCTL0 = 0x0080);
PROVIDE(ADC12MCTL1 = 0x0081);
PROVIDE(ADC12MCTL2 = 0x0082);
PROVIDE(ADC12MCTL3 = 0x0083);
PROVIDE(ADC12MCTL4 = 0x0084);
PROVIDE(ADC12MCTL5 = 0x0085);
PROVIDE(ADC12MCTL6 = 0x0086);
PROVIDE(ADC12MCTL7 = 0x0087);
PROVIDE(ADC12MCTL8 = 0x0088);
PROVIDE(ADC12MCTL9 = 0x0089);
PROVIDE(ADC12MCTL10 = 0x008A);
PROVIDE(ADC12MCTL11 = 0x008B);
PROVIDE(ADC12MCTL12 = 0x008C);
PROVIDE(ADC12MCTL13 = 0x008D);
PROVIDE(ADC12MCTL14 = 0x008E);
PROVIDE(ADC12MCTL15 = 0x008F);
/************************************************************
* DAC12
************************************************************/
PROVIDE(DAC12_0CTL = 0x01C0);
PROVIDE(DAC12_1CTL = 0x01C2);
PROVIDE(DAC12_0DAT = 0x01C8);
PROVIDE(DAC12_1DAT = 0x01CA);
/************************************************************
* DMA
************************************************************/
PROVIDE(DMACTL0 = 0x0122);
PROVIDE(DMACTL1 = 0x0124);
PROVIDE(DMA0CTL = 0x01E0);
PROVIDE(DMA1CTL = 0x01E8);
PROVIDE(DMA2CTL = 0x01F0);
PROVIDE(DMA0SA = 0x01E2);
PROVIDE(DMA0DA = 0x01E4);
PROVIDE(DMA0SZ = 0x01E6);
PROVIDE(DMA1SA = 0x01EA);
PROVIDE(DMA1DA = 0x01EC);
PROVIDE(DMA1SZ = 0x01EE);
PROVIDE(DMA2SA = 0x01F2);
PROVIDE(DMA2DA = 0x01F4);
PROVIDE(DMA2SZ = 0x01F6);
/************************************************************
* Interrupt Vectors (offset from 0xFFE0)
************************************************************/
/************************************************************
* End of Modules
************************************************************/

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@ -0,0 +1,303 @@
/* ============================================================================ */
/* Copyright (c) 2019, Texas Instruments Incorporated */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* * Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* * Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* */
/* * Neither the name of Texas Instruments Incorporated nor the names of */
/* its contributors may be used to endorse or promote products derived */
/* from this software without specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ============================================================================ */
/* This file supports MSP430F1612 devices. */
/* Version: 1.208 */
/* Default linker script, for normal executables */
OUTPUT_ARCH(msp430)
ENTRY(_start)
MEMORY {
SFR : ORIGIN = 0x0000, LENGTH = 0x0010 /* END=0x0010, size 16 */
RAM : ORIGIN = 0x1100, LENGTH = 0x1400 /* END=0x24FF, size 5120 */
RAM_MIRROR : ORIGIN = 0x0200, LENGTH = 0x0800
INFOMEM : ORIGIN = 0x1000, LENGTH = 0x0100 /* END=0x10FF, size 256 as 2 128-byte segments */
INFOA : ORIGIN = 0x1080, LENGTH = 0x0080 /* END=0x10FF, size 128 */
INFOB : ORIGIN = 0x1000, LENGTH = 0x0080 /* END=0x107F, size 128 */
ROM (rx) : ORIGIN = 0x2500, LENGTH = 0xDAE0 /* END=0xFFDF, size 56032 */
VECT1 : ORIGIN = 0xFFE0, LENGTH = 0x0002
VECT2 : ORIGIN = 0xFFE2, LENGTH = 0x0002
VECT3 : ORIGIN = 0xFFE4, LENGTH = 0x0002
VECT4 : ORIGIN = 0xFFE6, LENGTH = 0x0002
VECT5 : ORIGIN = 0xFFE8, LENGTH = 0x0002
VECT6 : ORIGIN = 0xFFEA, LENGTH = 0x0002
VECT7 : ORIGIN = 0xFFEC, LENGTH = 0x0002
VECT8 : ORIGIN = 0xFFEE, LENGTH = 0x0002
VECT9 : ORIGIN = 0xFFF0, LENGTH = 0x0002
VECT10 : ORIGIN = 0xFFF2, LENGTH = 0x0002
VECT11 : ORIGIN = 0xFFF4, LENGTH = 0x0002
VECT12 : ORIGIN = 0xFFF6, LENGTH = 0x0002
VECT13 : ORIGIN = 0xFFF8, LENGTH = 0x0002
VECT14 : ORIGIN = 0xFFFA, LENGTH = 0x0002
VECT15 : ORIGIN = 0xFFFC, LENGTH = 0x0002
RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002
}
SECTIONS
{
__interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) KEEP (*(__interrupt_vector_dacdma)) } > VECT1
__interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) KEEP (*(__interrupt_vector_port2)) } > VECT2
__interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) KEEP (*(__interrupt_vector_usart1tx)) } > VECT3
__interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) KEEP (*(__interrupt_vector_usart1rx)) } > VECT4
__interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) KEEP (*(__interrupt_vector_port1)) } > VECT5
__interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) KEEP (*(__interrupt_vector_timera1)) } > VECT6
__interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) KEEP (*(__interrupt_vector_timera0)) } > VECT7
__interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) KEEP (*(__interrupt_vector_adc12)) } > VECT8
__interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) KEEP (*(__interrupt_vector_usart0tx)) } > VECT9
__interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) KEEP (*(__interrupt_vector_usart0rx)) } > VECT10
__interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) KEEP (*(__interrupt_vector_wdt)) } > VECT11
__interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) KEEP (*(__interrupt_vector_comparatora)) } > VECT12
__interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) KEEP (*(__interrupt_vector_timerb1)) } > VECT13
__interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) KEEP (*(__interrupt_vector_timerb0)) } > VECT14
__interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) KEEP (*(__interrupt_vector_nmi)) } > VECT15
__reset_vector :
{
KEEP (*(__interrupt_vector_16))
KEEP (*(__interrupt_vector_reset))
KEEP (*(.resetvec))
} > RESETVEC
.rodata :
{
. = ALIGN(2);
*(.plt)
*(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
*(.rodata1)
KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
} > ROM
/* Note: This is a separate .rodata section for sections which are
read only but which older linkers treat as read-write.
This prevents older linkers from marking the entire .rodata
section as read-write. */
.rodata2 :
{
. = ALIGN(2);
PROVIDE (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE (__init_array_end = .);
. = ALIGN(2);
PROVIDE (__fini_array_start = .);
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
PROVIDE (__fini_array_end = .);
. = ALIGN(2);
*(.eh_frame_hdr)
KEEP (*(.eh_frame))
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from from the
crtend.o file until after the sorted ctors. The .ctor section
from the crtend file contains the end of ctors marker and it
must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} > ROM
.text :
{
. = ALIGN(2);
PROVIDE (_start = .);
KEEP (*(SORT(.crt_*)))
*(.lowtext .text .stub .text.* .gnu.linkonce.t.* .text:*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.interp .hash .dynsym .dynstr .gnu.version*)
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
. = ALIGN(2);
KEEP (*(.init))
KEEP (*(.fini))
KEEP (*(.tm_clone_table))
} > ROM
.data :
{
. = ALIGN(2);
PROVIDE (__datastart = .);
KEEP (*(.jcr))
*(.data.rel.ro.local) *(.data.rel.ro*)
*(.dynamic)
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
*(.data1)
*(.got.plt) *(.got)
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
. = ALIGN(2);
*(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
. = ALIGN(2);
_edata = .;
PROVIDE (edata = .);
PROVIDE (__dataend = .);
} > RAM AT>ROM
/* Note that crt0 assumes this is a multiple of two; all the
start/stop symbols are also assumed word-aligned. */
PROVIDE(__romdatastart = LOADADDR(.data));
PROVIDE (__romdatacopysize = SIZEOF(.data));
.bss :
{
. = ALIGN(2);
PROVIDE (__bssstart = .);
*(.dynbss)
*(.sbss .sbss.*)
*(.bss .bss.* .gnu.linkonce.b.*)
. = ALIGN(2);
*(COMMON)
PROVIDE (__bssend = .);
} > RAM
PROVIDE (__bsssize = SIZEOF(.bss));
/* This section contains data that is not initialised during load
or application reset. */
.noinit (NOLOAD) :
{
. = ALIGN(2);
PROVIDE (__noinit_start = .);
*(.noinit)
. = ALIGN(2);
PROVIDE (__noinit_end = .);
end = .;
} > RAM
/* We create this section so that "end" will always be in the
RAM region (matching .stack below), even if the .bss
section is empty. */
.heap (NOLOAD) :
{
. = ALIGN(2);
__heap_start__ = .;
_end = __heap_start__;
PROVIDE (end = .);
KEEP (*(.heap))
_end = .;
PROVIDE (end = .);
/* This word is here so that the section is not empty, and thus
not discarded by the linker. The actual value does not matter
and is ignored. */
LONG(0);
__heap_end__ = .;
__HeapLimit = __heap_end__;
} > RAM
/* WARNING: Do not place anything in RAM here.
The heap section must be the last section in RAM and the stack
section must be placed at the very end of the RAM region. */
.stack (ORIGIN (RAM) + LENGTH(RAM)) :
{
PROVIDE (__stack = .);
*(.stack)
}
.infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */
.infoB : {} > INFOB
.MSP430.attributes 0 :
{
KEEP (*(.MSP430.attributes))
KEEP (*(.gnu.attributes))
KEEP (*(__TI_build_attributes))
}
/* The rest are all not normally part of the runtime image. */
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/DISCARD/ : { *(.note.GNU-stack) }
}
/****************************************************************************/
/* Include peripherals memory map */
/****************************************************************************/
INCLUDE msp430f1612_symbols.ld

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/* ============================================================================ */
/* Copyright (c) 2019, Texas Instruments Incorporated */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* * Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* * Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* */
/* * Neither the name of Texas Instruments Incorporated nor the names of */
/* its contributors may be used to endorse or promote products derived */
/* from this software without specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ============================================================================ */
/* This file supports MSP430F1612 devices. */
/* Version: 1.208 */
/************************************************************
* STANDARD BITS
************************************************************/
/************************************************************
* STATUS REGISTER BITS
************************************************************/
/************************************************************
* PERIPHERAL FILE MAP
************************************************************/
/************************************************************
* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS
************************************************************/
PROVIDE(IE1 = 0x0000);
PROVIDE(IFG1 = 0x0002);
PROVIDE(ME1 = 0x0004);
PROVIDE(IE2 = 0x0001);
PROVIDE(IFG2 = 0x0003);
PROVIDE(ME2 = 0x0005);
/************************************************************
* WATCHDOG TIMER
************************************************************/
PROVIDE(WDTCTL = 0x0120);
/************************************************************
* HARDWARE MULTIPLIER
************************************************************/
PROVIDE(MPY = 0x0130);
PROVIDE(MPYS = 0x0132);
PROVIDE(MAC = 0x0134);
PROVIDE(MACS = 0x0136);
PROVIDE(OP2 = 0x0138);
PROVIDE(RESLO = 0x013A);
PROVIDE(RESHI = 0x013C);
PROVIDE(SUMEXT = 0x013E);
/************************************************************
* DIGITAL I/O Port1/2
************************************************************/
PROVIDE(P1IN = 0x0020);
PROVIDE(P1OUT = 0x0021);
PROVIDE(P1DIR = 0x0022);
PROVIDE(P1IFG = 0x0023);
PROVIDE(P1IES = 0x0024);
PROVIDE(P1IE = 0x0025);
PROVIDE(P1SEL = 0x0026);
PROVIDE(P2IN = 0x0028);
PROVIDE(P2OUT = 0x0029);
PROVIDE(P2DIR = 0x002A);
PROVIDE(P2IFG = 0x002B);
PROVIDE(P2IES = 0x002C);
PROVIDE(P2IE = 0x002D);
PROVIDE(P2SEL = 0x002E);
/************************************************************
* DIGITAL I/O Port3/4
************************************************************/
PROVIDE(P3IN = 0x0018);
PROVIDE(P3OUT = 0x0019);
PROVIDE(P3DIR = 0x001A);
PROVIDE(P3SEL = 0x001B);
PROVIDE(P4IN = 0x001C);
PROVIDE(P4OUT = 0x001D);
PROVIDE(P4DIR = 0x001E);
PROVIDE(P4SEL = 0x001F);
/************************************************************
* DIGITAL I/O Port5/6
************************************************************/
PROVIDE(P5IN = 0x0030);
PROVIDE(P5OUT = 0x0031);
PROVIDE(P5DIR = 0x0032);
PROVIDE(P5SEL = 0x0033);
PROVIDE(P6IN = 0x0034);
PROVIDE(P6OUT = 0x0035);
PROVIDE(P6DIR = 0x0036);
PROVIDE(P6SEL = 0x0037);
/************************************************************
* USART
************************************************************/
/************************************************************
* USART 0
************************************************************/
PROVIDE(U0CTL = 0x0070);
PROVIDE(U0TCTL = 0x0071);
PROVIDE(U0RCTL = 0x0072);
PROVIDE(U0MCTL = 0x0073);
PROVIDE(U0BR0 = 0x0074);
PROVIDE(U0BR1 = 0x0075);
PROVIDE(U0RXBUF = 0x0076);
PROVIDE(U0TXBUF = 0x0077);
/************************************************************
* USART 1
************************************************************/
PROVIDE(U1CTL = 0x0078);
PROVIDE(U1TCTL = 0x0079);
PROVIDE(U1RCTL = 0x007A);
PROVIDE(U1MCTL = 0x007B);
PROVIDE(U1BR0 = 0x007C);
PROVIDE(U1BR1 = 0x007D);
PROVIDE(U1RXBUF = 0x007E);
PROVIDE(U1TXBUF = 0x007F);
/************************************************************
* USART0 I2C
************************************************************/
PROVIDE(I2CIE = 0x0050);
PROVIDE(I2CIFG = 0x0051);
PROVIDE(I2CNDAT = 0x0052);
PROVIDE(I2CTCTL = 0x0071);
PROVIDE(I2CDCTL = 0x0072);
PROVIDE(I2CPSC = 0x0073);
PROVIDE(I2CSCLH = 0x0074);
PROVIDE(I2CSCLL = 0x0075);
PROVIDE(I2CDRB = 0x0076);
PROVIDE(I2CDRW = 0x0076);
PROVIDE(I2COA = 0x0118);
PROVIDE(I2CSA = 0x011A);
PROVIDE(I2CIV = 0x011C);
/************************************************************
* Timer A3
************************************************************/
PROVIDE(TAIV = 0x012E);
PROVIDE(TACTL = 0x0160);
PROVIDE(TACCTL0 = 0x0162);
PROVIDE(TACCTL1 = 0x0164);
PROVIDE(TACCTL2 = 0x0166);
PROVIDE(TAR = 0x0170);
PROVIDE(TACCR0 = 0x0172);
PROVIDE(TACCR1 = 0x0174);
PROVIDE(TACCR2 = 0x0176);
/************************************************************
* Timer B7
************************************************************/
PROVIDE(TBIV = 0x011E);
PROVIDE(TBCTL = 0x0180);
PROVIDE(TBCCTL0 = 0x0182);
PROVIDE(TBCCTL1 = 0x0184);
PROVIDE(TBCCTL2 = 0x0186);
PROVIDE(TBCCTL3 = 0x0188);
PROVIDE(TBCCTL4 = 0x018A);
PROVIDE(TBCCTL5 = 0x018C);
PROVIDE(TBCCTL6 = 0x018E);
PROVIDE(TBR = 0x0190);
PROVIDE(TBCCR0 = 0x0192);
PROVIDE(TBCCR1 = 0x0194);
PROVIDE(TBCCR2 = 0x0196);
PROVIDE(TBCCR3 = 0x0198);
PROVIDE(TBCCR4 = 0x019A);
PROVIDE(TBCCR5 = 0x019C);
PROVIDE(TBCCR6 = 0x019E);
/************************************************************
* Basic Clock Module
************************************************************/
PROVIDE(DCOCTL = 0x0056);
PROVIDE(BCSCTL1 = 0x0057);
PROVIDE(BCSCTL2 = 0x0058);
/************************************************************
* Brown-Out, Supply Voltage Supervision (SVS)
************************************************************/
PROVIDE(SVSCTL = 0x0055);
/*************************************************************
* Flash Memory
*************************************************************/
PROVIDE(FCTL1 = 0x0128);
PROVIDE(FCTL2 = 0x012A);
PROVIDE(FCTL3 = 0x012C);
/************************************************************
* Comparator A
************************************************************/
PROVIDE(CACTL1 = 0x0059);
PROVIDE(CACTL2 = 0x005A);
PROVIDE(CAPD = 0x005B);
/************************************************************
* ADC12
************************************************************/
PROVIDE(ADC12CTL0 = 0x01A0);
PROVIDE(ADC12CTL1 = 0x01A2);
PROVIDE(ADC12IFG = 0x01A4);
PROVIDE(ADC12IE = 0x01A6);
PROVIDE(ADC12IV = 0x01A8);
PROVIDE(ADC12MEM0 = 0x0140);
PROVIDE(ADC12MEM1 = 0x0142);
PROVIDE(ADC12MEM2 = 0x0144);
PROVIDE(ADC12MEM3 = 0x0146);
PROVIDE(ADC12MEM4 = 0x0148);
PROVIDE(ADC12MEM5 = 0x014A);
PROVIDE(ADC12MEM6 = 0x014C);
PROVIDE(ADC12MEM7 = 0x014E);
PROVIDE(ADC12MEM8 = 0x0150);
PROVIDE(ADC12MEM9 = 0x0152);
PROVIDE(ADC12MEM10 = 0x0154);
PROVIDE(ADC12MEM11 = 0x0156);
PROVIDE(ADC12MEM12 = 0x0158);
PROVIDE(ADC12MEM13 = 0x015A);
PROVIDE(ADC12MEM14 = 0x015C);
PROVIDE(ADC12MEM15 = 0x015E);
PROVIDE(ADC12MCTL0 = 0x0080);
PROVIDE(ADC12MCTL1 = 0x0081);
PROVIDE(ADC12MCTL2 = 0x0082);
PROVIDE(ADC12MCTL3 = 0x0083);
PROVIDE(ADC12MCTL4 = 0x0084);
PROVIDE(ADC12MCTL5 = 0x0085);
PROVIDE(ADC12MCTL6 = 0x0086);
PROVIDE(ADC12MCTL7 = 0x0087);
PROVIDE(ADC12MCTL8 = 0x0088);
PROVIDE(ADC12MCTL9 = 0x0089);
PROVIDE(ADC12MCTL10 = 0x008A);
PROVIDE(ADC12MCTL11 = 0x008B);
PROVIDE(ADC12MCTL12 = 0x008C);
PROVIDE(ADC12MCTL13 = 0x008D);
PROVIDE(ADC12MCTL14 = 0x008E);
PROVIDE(ADC12MCTL15 = 0x008F);
/************************************************************
* DAC12
************************************************************/
PROVIDE(DAC12_0CTL = 0x01C0);
PROVIDE(DAC12_1CTL = 0x01C2);
PROVIDE(DAC12_0DAT = 0x01C8);
PROVIDE(DAC12_1DAT = 0x01CA);
/************************************************************
* DMA
************************************************************/
PROVIDE(DMACTL0 = 0x0122);
PROVIDE(DMACTL1 = 0x0124);
PROVIDE(DMA0CTL = 0x01E0);
PROVIDE(DMA1CTL = 0x01E8);
PROVIDE(DMA2CTL = 0x01F0);
PROVIDE(DMA0SA = 0x01E2);
PROVIDE(DMA0DA = 0x01E4);
PROVIDE(DMA0SZ = 0x01E6);
PROVIDE(DMA1SA = 0x01EA);
PROVIDE(DMA1DA = 0x01EC);
PROVIDE(DMA1SZ = 0x01EE);
PROVIDE(DMA2SA = 0x01F2);
PROVIDE(DMA2DA = 0x01F4);
PROVIDE(DMA2SZ = 0x01F6);
/************************************************************
* Interrupt Vectors (offset from 0xFFE0)
************************************************************/
/************************************************************
* End of Modules
************************************************************/

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/* ============================================================================ */
/* Copyright (c) 2019, Texas Instruments Incorporated */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* * Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* * Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* */
/* * Neither the name of Texas Instruments Incorporated nor the names of */
/* its contributors may be used to endorse or promote products derived */
/* from this software without specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ============================================================================ */
/* This file supports MSP430F2617 devices. */
/* Version: 1.208 */
/* Default linker script, for normal executables */
OUTPUT_ARCH(msp430)
ENTRY(_start)
MEMORY {
SFR : ORIGIN = 0x0000, LENGTH = 0x0010 /* END=0x0010, size 16 */
RAM : ORIGIN = 0x1100, LENGTH = 0x2000 /* END=0x30FF, size 8192 */
RAM_MIRROR : ORIGIN = 0x0200, LENGTH = 0x0800
INFOMEM : ORIGIN = 0x1000, LENGTH = 0x0100 /* END=0x10FF, size 256 as 4 64-byte segments */
INFOA : ORIGIN = 0x10C0, LENGTH = 0x0040 /* END=0x10FF, size 64 */
INFOB : ORIGIN = 0x1080, LENGTH = 0x0040 /* END=0x10BF, size 64 */
INFOC : ORIGIN = 0x1040, LENGTH = 0x0040 /* END=0x107F, size 64 */
INFOD : ORIGIN = 0x1000, LENGTH = 0x0040 /* END=0x103F, size 64 */
ROM (rx) : ORIGIN = 0x3100, LENGTH = 0xCEBE /* END=0xFFBD, size 52926 */
HIROM (rx) : ORIGIN = 0x00010000, LENGTH = 0x00009FFF
BSLSIGNATURE : ORIGIN = 0xFFBE, LENGTH = 0x0002
VECT1 : ORIGIN = 0xFFC0, LENGTH = 0x0002
VECT2 : ORIGIN = 0xFFC2, LENGTH = 0x0002
VECT3 : ORIGIN = 0xFFC4, LENGTH = 0x0002
VECT4 : ORIGIN = 0xFFC6, LENGTH = 0x0002
VECT5 : ORIGIN = 0xFFC8, LENGTH = 0x0002
VECT6 : ORIGIN = 0xFFCA, LENGTH = 0x0002
VECT7 : ORIGIN = 0xFFCC, LENGTH = 0x0002
VECT8 : ORIGIN = 0xFFCE, LENGTH = 0x0002
VECT9 : ORIGIN = 0xFFD0, LENGTH = 0x0002
VECT10 : ORIGIN = 0xFFD2, LENGTH = 0x0002
VECT11 : ORIGIN = 0xFFD4, LENGTH = 0x0002
VECT12 : ORIGIN = 0xFFD6, LENGTH = 0x0002
VECT13 : ORIGIN = 0xFFD8, LENGTH = 0x0002
VECT14 : ORIGIN = 0xFFDA, LENGTH = 0x0002
VECT15 : ORIGIN = 0xFFDC, LENGTH = 0x0002
VECT16 : ORIGIN = 0xFFDE, LENGTH = 0x0002
VECT17 : ORIGIN = 0xFFE0, LENGTH = 0x0002
VECT18 : ORIGIN = 0xFFE2, LENGTH = 0x0002
VECT19 : ORIGIN = 0xFFE4, LENGTH = 0x0002
VECT20 : ORIGIN = 0xFFE6, LENGTH = 0x0002
VECT21 : ORIGIN = 0xFFE8, LENGTH = 0x0002
VECT22 : ORIGIN = 0xFFEA, LENGTH = 0x0002
VECT23 : ORIGIN = 0xFFEC, LENGTH = 0x0002
VECT24 : ORIGIN = 0xFFEE, LENGTH = 0x0002
VECT25 : ORIGIN = 0xFFF0, LENGTH = 0x0002
VECT26 : ORIGIN = 0xFFF2, LENGTH = 0x0002
VECT27 : ORIGIN = 0xFFF4, LENGTH = 0x0002
VECT28 : ORIGIN = 0xFFF6, LENGTH = 0x0002
VECT29 : ORIGIN = 0xFFF8, LENGTH = 0x0002
VECT30 : ORIGIN = 0xFFFA, LENGTH = 0x0002
VECT31 : ORIGIN = 0xFFFC, LENGTH = 0x0002
RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002
}
SECTIONS
{
.bslsignature : {} > BSLSIGNATURE
__interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) KEEP (*(__interrupt_vector_reserved0)) } > VECT1
__interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) KEEP (*(__interrupt_vector_reserved1)) } > VECT2
__interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) KEEP (*(__interrupt_vector_reserved2)) } > VECT3
__interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) KEEP (*(__interrupt_vector_reserved3)) } > VECT4
__interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) KEEP (*(__interrupt_vector_reserved4)) } > VECT5
__interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) KEEP (*(__interrupt_vector_reserved5)) } > VECT6
__interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) KEEP (*(__interrupt_vector_reserved6)) } > VECT7
__interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) KEEP (*(__interrupt_vector_reserved7)) } > VECT8
__interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) KEEP (*(__interrupt_vector_reserved8)) } > VECT9
__interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) KEEP (*(__interrupt_vector_reserved9)) } > VECT10
__interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) KEEP (*(__interrupt_vector_reserved10)) } > VECT11
__interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) KEEP (*(__interrupt_vector_reserved11)) } > VECT12
__interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) KEEP (*(__interrupt_vector_reserved12)) } > VECT13
__interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) KEEP (*(__interrupt_vector_reserved13)) } > VECT14
__interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) KEEP (*(__interrupt_vector_dac12)) } > VECT15
__interrupt_vector_16 : { KEEP (*(__interrupt_vector_16)) KEEP (*(__interrupt_vector_dma)) } > VECT16
__interrupt_vector_17 : { KEEP (*(__interrupt_vector_17)) KEEP (*(__interrupt_vector_usciab1tx)) } > VECT17
__interrupt_vector_18 : { KEEP (*(__interrupt_vector_18)) KEEP (*(__interrupt_vector_usciab1rx)) } > VECT18
__interrupt_vector_19 : { KEEP (*(__interrupt_vector_19)) KEEP (*(__interrupt_vector_port1)) } > VECT19
__interrupt_vector_20 : { KEEP (*(__interrupt_vector_20)) KEEP (*(__interrupt_vector_port2)) } > VECT20
__interrupt_vector_21 : { KEEP (*(__interrupt_vector_21)) KEEP (*(__interrupt_vector_reserved20)) } > VECT21
__interrupt_vector_22 : { KEEP (*(__interrupt_vector_22)) KEEP (*(__interrupt_vector_adc12)) } > VECT22
__interrupt_vector_23 : { KEEP (*(__interrupt_vector_23)) KEEP (*(__interrupt_vector_usciab0tx)) } > VECT23
__interrupt_vector_24 : { KEEP (*(__interrupt_vector_24)) KEEP (*(__interrupt_vector_usciab0rx)) } > VECT24
__interrupt_vector_25 : { KEEP (*(__interrupt_vector_25)) KEEP (*(__interrupt_vector_timera1)) } > VECT25
__interrupt_vector_26 : { KEEP (*(__interrupt_vector_26)) KEEP (*(__interrupt_vector_timera0)) } > VECT26
__interrupt_vector_27 : { KEEP (*(__interrupt_vector_27)) KEEP (*(__interrupt_vector_wdt)) } > VECT27
__interrupt_vector_28 : { KEEP (*(__interrupt_vector_28)) KEEP (*(__interrupt_vector_comparatora)) } > VECT28
__interrupt_vector_29 : { KEEP (*(__interrupt_vector_29)) KEEP (*(__interrupt_vector_timerb1)) } > VECT29
__interrupt_vector_30 : { KEEP (*(__interrupt_vector_30)) KEEP (*(__interrupt_vector_timerb0)) } > VECT30
__interrupt_vector_31 : { KEEP (*(__interrupt_vector_31)) KEEP (*(__interrupt_vector_nmi)) } > VECT31
__reset_vector :
{
KEEP (*(__interrupt_vector_32))
KEEP (*(__interrupt_vector_reset))
KEEP (*(.resetvec))
} > RESETVEC
.lower.rodata :
{
. = ALIGN(2);
*(.lower.rodata.* .lower.rodata)
} > ROM
.rodata :
{
. = ALIGN(2);
*(.plt)
. = ALIGN(2);
*(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
*(.rodata1)
KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
} > ROM
/* Note: This is a separate .rodata section for sections which are
read only but which older linkers treat as read-write.
This prevents older linkers from marking the entire .rodata
section as read-write. */
.rodata2 :
{
. = ALIGN(2);
PROVIDE (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE (__preinit_array_end = .);
. = ALIGN(2);
PROVIDE (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE (__init_array_end = .);
. = ALIGN(2);
PROVIDE (__fini_array_start = .);
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
PROVIDE (__fini_array_end = .);
. = ALIGN(2);
*(.eh_frame_hdr)
KEEP (*(.eh_frame))
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from from the
crtend.o file until after the sorted ctors. The .ctor section
from the crtend file contains the end of ctors marker and it
must be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} > ROM
.upper.rodata :
{
*(.upper.rodata.* .upper.rodata)
} > HIROM
.data :
{
. = ALIGN(2);
PROVIDE (__datastart = .);
*(.lower.data.* .lower.data)
. = ALIGN(2);
*(.either.data.* .either.data)
. = ALIGN(2);
KEEP (*(.jcr))
*(.data.rel.ro.local) *(.data.rel.ro*)
*(.dynamic)
. = ALIGN(2);
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
*(.data1)
*(.got.plt) *(.got)
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
. = ALIGN(2);
*(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
. = ALIGN(2);
_edata = .;
PROVIDE (edata = .);
PROVIDE (__dataend = .);
} > RAM AT> ROM
/* Note that crt0 assumes this is a multiple of two; all the
start/stop symbols are also assumed word-aligned. */
PROVIDE(__romdatastart = LOADADDR(.data));
PROVIDE (__romdatacopysize = SIZEOF(.data));
.bss :
{
. = ALIGN(2);
PROVIDE (__bssstart = .);
*(.lower.bss.* .lower.bss)
. = ALIGN(2);
*(.either.bss.* .either.bss)
*(.dynbss)
*(.sbss .sbss.*)
*(.bss .bss.* .gnu.linkonce.b.*)
. = ALIGN(2);
*(COMMON)
PROVIDE (__bssend = .);
} > RAM
PROVIDE (__bsssize = SIZEOF(.bss));
/* This section contains data that is not initialised during load
or application reset. */
.noinit (NOLOAD) :
{
. = ALIGN(2);
PROVIDE (__noinit_start = .);
*(.noinit)
. = ALIGN(2);
PROVIDE (__noinit_end = .);
} > RAM
/* We create this section so that "end" will always be in the
RAM region (matching .stack below), even if the .bss
section is empty. */
.heap (NOLOAD) :
{
. = ALIGN(2);
__heap_start__ = .;
_end = __heap_start__;
PROVIDE (end = .);
KEEP (*(.heap))
_end = .;
PROVIDE (end = .);
/* This word is here so that the section is not empty, and thus
not discarded by the linker. The actual value does not matter
and is ignored. */
LONG(0);
__heap_end__ = .;
__HeapLimit = __heap_end__;
} > RAM
/* WARNING: Do not place anything in RAM here.
The heap section must be the last section in RAM and the stack
section must be placed at the very end of the RAM region. */
.stack (ORIGIN (RAM) + LENGTH(RAM)) :
{
PROVIDE (__stack = .);
*(.stack)
}
/* This is just for crt0.S and interrupt handlers. */
.lowtext :
{
PROVIDE (_start = .);
. = ALIGN(2);
KEEP (*(SORT(.crt_*)))
KEEP (*(.lowtext))
} > ROM
.lower.text :
{
. = ALIGN(2);
*(.lower.text.* .lower.text)
} > ROM
.text :
{
. = ALIGN(2);
*(.text .stub .text.* .gnu.linkonce.t.* .text:*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.interp .hash .dynsym .dynstr .gnu.version*)
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
. = ALIGN(2);
KEEP (*(.init))
KEEP (*(.fini))
KEEP (*(.tm_clone_table))
} > ROM
.upper.text :
{
. = ALIGN(2);
*(.upper.text.* .upper.text)
} > HIROM
.infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */
.infoB : {} > INFOB
.infoC : {} > INFOC
.infoD : {} > INFOD
/* Make sure that upper data sections are not used. */
.upper :
{
*(.upper.bss.* .upper.bss)
*(.upper.data.* .upper.data)
ASSERT (SIZEOF(.upper) == 0, "This MCU does not support placing read/write data into high memory");
} > HIROM
/* The rest are all not normally part of the runtime image. */
.MSP430.attributes 0 :
{
KEEP (*(.MSP430.attributes))
KEEP (*(.gnu.attributes))
KEEP (*(__TI_build_attributes))
}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1. */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions. */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2. */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2. */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions. */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* DWARF 3 */
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
/* DWARF Extension. */
.debug_macro 0 : { *(.debug_macro) }
/DISCARD/ : { *(.note.GNU-stack) }
}
/****************************************************************************/
/* Include peripherals memory map */
/****************************************************************************/
INCLUDE msp430f2617_symbols.ld

328
cpu/msp430_common/vendor/msp430-gcc-support-files/include/msp430f2617_symbols.ld vendored Normal file
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@ -0,0 +1,328 @@
/* ============================================================================ */
/* Copyright (c) 2019, Texas Instruments Incorporated */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* * Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* * Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* */
/* * Neither the name of Texas Instruments Incorporated nor the names of */
/* its contributors may be used to endorse or promote products derived */
/* from this software without specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ============================================================================ */
/* This file supports MSP430F2617 devices. */
/* Version: 1.208 */
/************************************************************
* STANDARD BITS
************************************************************/
/************************************************************
* STATUS REGISTER BITS
************************************************************/
/************************************************************
* PERIPHERAL FILE MAP
************************************************************/
/************************************************************
* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS
************************************************************/
PROVIDE(IE1 = 0x0000);
PROVIDE(IFG1 = 0x0002);
PROVIDE(IE2 = 0x0001);
PROVIDE(IFG2 = 0x0003);
PROVIDE(UC1IE = 0x0006);
PROVIDE(UC1IFG = 0x0007);
/************************************************************
* ADC12
************************************************************/
PROVIDE(ADC12CTL0 = 0x01A0);
PROVIDE(ADC12CTL1 = 0x01A2);
PROVIDE(ADC12IFG = 0x01A4);
PROVIDE(ADC12IE = 0x01A6);
PROVIDE(ADC12IV = 0x01A8);
PROVIDE(ADC12MEM0 = 0x0140);
PROVIDE(ADC12MEM1 = 0x0142);
PROVIDE(ADC12MEM2 = 0x0144);
PROVIDE(ADC12MEM3 = 0x0146);
PROVIDE(ADC12MEM4 = 0x0148);
PROVIDE(ADC12MEM5 = 0x014A);
PROVIDE(ADC12MEM6 = 0x014C);
PROVIDE(ADC12MEM7 = 0x014E);
PROVIDE(ADC12MEM8 = 0x0150);
PROVIDE(ADC12MEM9 = 0x0152);
PROVIDE(ADC12MEM10 = 0x0154);
PROVIDE(ADC12MEM11 = 0x0156);
PROVIDE(ADC12MEM12 = 0x0158);
PROVIDE(ADC12MEM13 = 0x015A);
PROVIDE(ADC12MEM14 = 0x015C);
PROVIDE(ADC12MEM15 = 0x015E);
PROVIDE(ADC12MCTL0 = 0x0080);
PROVIDE(ADC12MCTL1 = 0x0081);
PROVIDE(ADC12MCTL2 = 0x0082);
PROVIDE(ADC12MCTL3 = 0x0083);
PROVIDE(ADC12MCTL4 = 0x0084);
PROVIDE(ADC12MCTL5 = 0x0085);
PROVIDE(ADC12MCTL6 = 0x0086);
PROVIDE(ADC12MCTL7 = 0x0087);
PROVIDE(ADC12MCTL8 = 0x0088);
PROVIDE(ADC12MCTL9 = 0x0089);
PROVIDE(ADC12MCTL10 = 0x008A);
PROVIDE(ADC12MCTL11 = 0x008B);
PROVIDE(ADC12MCTL12 = 0x008C);
PROVIDE(ADC12MCTL13 = 0x008D);
PROVIDE(ADC12MCTL14 = 0x008E);
PROVIDE(ADC12MCTL15 = 0x008F);
/************************************************************
* Basic Clock Module
************************************************************/
PROVIDE(DCOCTL = 0x0056);
PROVIDE(BCSCTL1 = 0x0057);
PROVIDE(BCSCTL2 = 0x0058);
PROVIDE(BCSCTL3 = 0x0053);
/************************************************************
* Comparator A
************************************************************/
PROVIDE(CACTL1 = 0x0059);
PROVIDE(CACTL2 = 0x005A);
PROVIDE(CAPD = 0x005B);
/************************************************************
* DAC12
************************************************************/
PROVIDE(DAC12_0CTL = 0x01C0);
PROVIDE(DAC12_1CTL = 0x01C2);
PROVIDE(DAC12_0DAT = 0x01C8);
PROVIDE(DAC12_1DAT = 0x01CA);
/************************************************************
* DMA_X
************************************************************/
PROVIDE(DMACTL0 = 0x0122);
PROVIDE(DMACTL1 = 0x0124);
PROVIDE(DMAIV = 0x0126);
PROVIDE(DMA0CTL = 0x01D0);
PROVIDE(DMA1CTL = 0x01DC);
PROVIDE(DMA2CTL = 0x01E8);
PROVIDE(DMA0SA = 0x01D2);
PROVIDE(DMA0SAL = 0x01D2);
PROVIDE(DMA0DA = 0x01D6);
PROVIDE(DMA0DAL = 0x01D6);
PROVIDE(DMA0SZ = 0x01DA);
PROVIDE(DMA1SA = 0x01DE);
PROVIDE(DMA1SAL = 0x01DE);
PROVIDE(DMA1DA = 0x01E2);
PROVIDE(DMA1DAL = 0x01E2);
PROVIDE(DMA1SZ = 0x01E6);
PROVIDE(DMA2SA = 0x01EA);
PROVIDE(DMA2SAL = 0x01EA);
PROVIDE(DMA2DA = 0x01EE);
PROVIDE(DMA2DAL = 0x01EE);
PROVIDE(DMA2SZ = 0x01F2);
/*************************************************************
* Flash Memory
*************************************************************/
PROVIDE(FCTL1 = 0x0128);
PROVIDE(FCTL2 = 0x012A);
PROVIDE(FCTL3 = 0x012C);
PROVIDE(FCTL4 = 0x01BE);
/************************************************************
* HARDWARE MULTIPLIER
************************************************************/
PROVIDE(MPY = 0x0130);
PROVIDE(MPYS = 0x0132);
PROVIDE(MAC = 0x0134);
PROVIDE(MACS = 0x0136);
PROVIDE(OP2 = 0x0138);
PROVIDE(RESLO = 0x013A);
PROVIDE(RESHI = 0x013C);
PROVIDE(SUMEXT = 0x013E);
/************************************************************
* DIGITAL I/O Port1/2 Pull up / Pull down Resistors
************************************************************/
PROVIDE(P1IN = 0x0020);
PROVIDE(P1OUT = 0x0021);
PROVIDE(P1DIR = 0x0022);
PROVIDE(P1IFG = 0x0023);
PROVIDE(P1IES = 0x0024);
PROVIDE(P1IE = 0x0025);
PROVIDE(P1SEL = 0x0026);
PROVIDE(P1REN = 0x0027);
PROVIDE(P2IN = 0x0028);
PROVIDE(P2OUT = 0x0029);
PROVIDE(P2DIR = 0x002A);
PROVIDE(P2IFG = 0x002B);
PROVIDE(P2IES = 0x002C);
PROVIDE(P2IE = 0x002D);
PROVIDE(P2SEL = 0x002E);
PROVIDE(P2REN = 0x002F);
/************************************************************
* DIGITAL I/O Port3/4 Pull up / Pull down Resistors
************************************************************/
PROVIDE(P3IN = 0x0018);
PROVIDE(P3OUT = 0x0019);
PROVIDE(P3DIR = 0x001A);
PROVIDE(P3SEL = 0x001B);
PROVIDE(P3REN = 0x0010);
PROVIDE(P4IN = 0x001C);
PROVIDE(P4OUT = 0x001D);
PROVIDE(P4DIR = 0x001E);
PROVIDE(P4SEL = 0x001F);
PROVIDE(P4REN = 0x0011);
/************************************************************
* DIGITAL I/O Port5/6 Pull up / Pull down Resistors
************************************************************/
PROVIDE(P5IN = 0x0030);
PROVIDE(P5OUT = 0x0031);
PROVIDE(P5DIR = 0x0032);
PROVIDE(P5SEL = 0x0033);
PROVIDE(P5REN = 0x0012);
PROVIDE(P6IN = 0x0034);
PROVIDE(P6OUT = 0x0035);
PROVIDE(P6DIR = 0x0036);
PROVIDE(P6SEL = 0x0037);
PROVIDE(P6REN = 0x0013);
/************************************************************
* DIGITAL I/O Port7/8 Pull up / Pull down Resistors
************************************************************/
PROVIDE(P7IN = 0x0038);
PROVIDE(P7OUT = 0x003A);
PROVIDE(P7DIR = 0x003C);
PROVIDE(P7SEL = 0x003E);
PROVIDE(P7REN = 0x0014);
PROVIDE(P8IN = 0x0039);
PROVIDE(P8OUT = 0x003B);
PROVIDE(P8DIR = 0x003D);
PROVIDE(P8SEL = 0x003F);
PROVIDE(P8REN = 0x0015);
PROVIDE(PAIN = 0x0038);
PROVIDE(PAOUT = 0x003A);
PROVIDE(PADIR = 0x003C);
PROVIDE(PASEL = 0x003E);
PROVIDE(PAREN = 0x0014);
/************************************************************
* Brown-Out, Supply Voltage Supervision (SVS)
************************************************************/
PROVIDE(SVSCTL = 0x0055);
/************************************************************
* Timer A3
************************************************************/
PROVIDE(TAIV = 0x012E);
PROVIDE(TACTL = 0x0160);
PROVIDE(TACCTL0 = 0x0162);
PROVIDE(TACCTL1 = 0x0164);
PROVIDE(TACCTL2 = 0x0166);
PROVIDE(TAR = 0x0170);
PROVIDE(TACCR0 = 0x0172);
PROVIDE(TACCR1 = 0x0174);
PROVIDE(TACCR2 = 0x0176);
/************************************************************
* Timer B7
************************************************************/
PROVIDE(TBIV = 0x011E);
PROVIDE(TBCTL = 0x0180);
PROVIDE(TBCCTL0 = 0x0182);
PROVIDE(TBCCTL1 = 0x0184);
PROVIDE(TBCCTL2 = 0x0186);
PROVIDE(TBCCTL3 = 0x0188);
PROVIDE(TBCCTL4 = 0x018A);
PROVIDE(TBCCTL5 = 0x018C);
PROVIDE(TBCCTL6 = 0x018E);
PROVIDE(TBR = 0x0190);
PROVIDE(TBCCR0 = 0x0192);
PROVIDE(TBCCR1 = 0x0194);
PROVIDE(TBCCR2 = 0x0196);
PROVIDE(TBCCR3 = 0x0198);
PROVIDE(TBCCR4 = 0x019A);
PROVIDE(TBCCR5 = 0x019C);
PROVIDE(TBCCR6 = 0x019E);
/************************************************************
* USCI
************************************************************/
PROVIDE(UCA0CTL0 = 0x0060);
PROVIDE(UCA0CTL1 = 0x0061);
PROVIDE(UCA0BR0 = 0x0062);
PROVIDE(UCA0BR1 = 0x0063);
PROVIDE(UCA0MCTL = 0x0064);
PROVIDE(UCA0STAT = 0x0065);
PROVIDE(UCA0RXBUF = 0x0066);
PROVIDE(UCA0TXBUF = 0x0067);
PROVIDE(UCA0ABCTL = 0x005D);
PROVIDE(UCA0IRTCTL = 0x005E);
PROVIDE(UCA0IRRCTL = 0x005F);
PROVIDE(UCB0CTL0 = 0x0068);
PROVIDE(UCB0CTL1 = 0x0069);
PROVIDE(UCB0BR0 = 0x006A);
PROVIDE(UCB0BR1 = 0x006B);
PROVIDE(UCB0I2CIE = 0x006C);
PROVIDE(UCB0STAT = 0x006D);
PROVIDE(UCB0RXBUF = 0x006E);
PROVIDE(UCB0TXBUF = 0x006F);
PROVIDE(UCB0I2COA = 0x0118);
PROVIDE(UCB0I2CSA = 0x011A);
PROVIDE(UCA1CTL0 = 0x00D0);
PROVIDE(UCA1CTL1 = 0x00D1);
PROVIDE(UCA1BR0 = 0x00D2);
PROVIDE(UCA1BR1 = 0x00D3);
PROVIDE(UCA1MCTL = 0x00D4);
PROVIDE(UCA1STAT = 0x00D5);
PROVIDE(UCA1RXBUF = 0x00D6);
PROVIDE(UCA1TXBUF = 0x00D7);
PROVIDE(UCA1ABCTL = 0x00CD);
PROVIDE(UCA1IRTCTL = 0x00CE);
PROVIDE(UCA1IRRCTL = 0x00CF);
PROVIDE(UCB1CTL0 = 0x00D8);
PROVIDE(UCB1CTL1 = 0x00D9);
PROVIDE(UCB1BR0 = 0x00DA);
PROVIDE(UCB1BR1 = 0x00DB);
PROVIDE(UCB1I2CIE = 0x00DC);
PROVIDE(UCB1STAT = 0x00DD);
PROVIDE(UCB1RXBUF = 0x00DE);
PROVIDE(UCB1TXBUF = 0x00DF);
PROVIDE(UCB1I2COA = 0x017C);
PROVIDE(UCB1I2CSA = 0x017E);
/************************************************************
* WATCHDOG TIMER
************************************************************/
PROVIDE(WDTCTL = 0x0120);
/************************************************************
* Calibration Data in Info Mem
************************************************************/
PROVIDE(TLV_CHECKSUM = 0x10C0);
PROVIDE(TLV_DCO_30_TAG = 0x10F6);
PROVIDE(TLV_DCO_30_LEN = 0x10F7);
PROVIDE(TLV_ADC12_1_TAG = 0x10DA);
PROVIDE(TLV_ADC12_1_LEN = 0x10DB);
/************************************************************
* Calibration Data in Info Mem
************************************************************/
PROVIDE(CALDCO_16MHZ = 0x10F8);
PROVIDE(CALBC1_16MHZ = 0x10F9);
PROVIDE(CALDCO_12MHZ = 0x10FA);
PROVIDE(CALBC1_12MHZ = 0x10FB);
PROVIDE(CALDCO_8MHZ = 0x10FC);
PROVIDE(CALBC1_8MHZ = 0x10FD);
PROVIDE(CALDCO_1MHZ = 0x10FE);
PROVIDE(CALBC1_1MHZ = 0x10FF);
/************************************************************
* Interrupt Vectors (offset from 0xFFC0)
************************************************************/
/************************************************************
* End of Modules
************************************************************/

19
cpu/msp430_common/vendor/update.sh vendored Normal file
View File

@ -0,0 +1,19 @@
#!/bin/sh
# This script downloads downloads and extracts the msp430 support files,
# then removes currently unused headers and linker scripts.
set -e
URL="https://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPGCC/latest/exports/msp430-gcc-support-files-1.208.zip"
rm -Rf msp430-gcc-support-files
_CPUS="$(git -C ../../.. grep -o '^CPU_MODEL.=.*430.*$' | cut -d' ' -f 3 | sort -u)"
wget $URL
unzip $(basename $URL)
(
cd msp430-gcc-support-files/include
rm $(ls | grep -v -E '(msp430\.h|in430\.h|legacy\.h|iomacros\.h|devices.csv)' | \
grep -v -F "${_CPUS}" )
)