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cpu/stm32: add sampling time to F4/F7 ADC driver

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This commit is contained in:
Fabian Hüßler 2022-01-23 10:40:51 +01:00
parent 2775c72018
commit e3509fc023
1 changed files with 15 additions and 1 deletions
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16
cpu/stm32/periph/adc_f4_f7.c
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@ -30,6 +30,12 @@
*/ */
#define MAX_ADC_SPEED (12000000U) #define MAX_ADC_SPEED (12000000U)
/**
* @brief Maximum sampling time for each channel (480 cycles)
* T_CONV[µs] = (RESOLUTION[bits] + SMP[cycles]) / CLOCK_SPEED[MHz]
*/
#define MAX_ADC_SMP (7u)
/** /**
* @brief Default VBAT undefined value * @brief Default VBAT undefined value
*/ */
@ -93,7 +99,15 @@ int adc_init(adc_t line)
} }
} }
ADC->CCR = ((clk_div / 2) - 1) << 16; ADC->CCR = ((clk_div / 2) - 1) << 16;
/* set sampling time to the maximum */
if (adc_config[line].chan >= 10) {
dev(line)->SMPR1 &= ~(MAX_ADC_SMP << (3 * (adc_config[line].chan - 10)));
dev(line)->SMPR1 |= MAX_ADC_SMP << (3 * (adc_config[line].chan - 10));
}
else {
dev(line)->SMPR1 &= ~(MAX_ADC_SMP << (3 * adc_config[line].chan));
dev(line)->SMPR2 |= MAX_ADC_SMP << (3 * adc_config[line].chan);
}
/* free the device again */ /* free the device again */
done(line); done(line);
return 0; return 0;