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cpu/esp32/periph: flush UART TX FIFO before a baudrate change

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Gunar Schorcht 2019-11-28 08:57:12 +01:00
parent 83892aa184
commit e3bb708e4d
1 changed files with 2 additions and 0 deletions
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2
cpu/esp32/periph/uart.c
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@ -281,6 +281,8 @@ static void _uart_config (uart_t uart)
/* setup the baudrate */
if (uart == UART_DEV(0) || uart == UART_DEV(1)) {
/* wait until TX FIFO is empty */
while (_uarts[uart].regs->status.txfifo_cnt) { }
/* for UART0 and UART1, we can us the ROM function */
uart_div_modify(uart, (UART_CLK_FREQ << 4) / _uarts[uart].baudrate);
}