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Merge pull request #3313 from gebart/pr/eINT-fixes

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eINT/dINT fixes
This commit is contained in:
Kaspar Schleiser 2015-09-29 12:39:16 +02:00
commit effb15a2cc
8 changed files with 3 additions and 51 deletions
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19
cpu/arm7_common/common.s
View File

@ -40,25 +40,6 @@
.global cpu_switch_context_exit
.global task_return
.global ctx_switch
.global dINT
.global eINT
.func
dINT:
mrs r0, cpsr
orr r0, r0, #NOINT /* Disable Int */
msr CPSR_c, r0
mov pc,lr
.endfunc
.func
eINT:
mrs r0, cpsr
and r0, r0, #~NOINT /* Enable Int */
msr CPSR_c, r0
mov pc,lr
.endfunc
ctx_switch:
/* Save return address on stack */

3
cpu/arm7_common/include/arm_cpu.h
View File

@ -20,9 +20,6 @@
#define NEW_TASK_CPSR 0x1F
#define WORDSIZE 32
extern void dINT(void);
extern void eINT(void);
uint32_t get_system_speed(void);
void cpu_clock_scale(uint32_t source, uint32_t target, uint32_t *prescale);

3
cpu/atmega_common/include/cpu.h
View File

@ -43,9 +43,6 @@
extern "C" {
#endif
#define eINT enableIRQ
#define dINT disableIRQ
/**
* @brief global in-ISR state variable
*/

8
cpu/cortexm_common/include/cpu.h
View File

@ -64,14 +64,6 @@ extern "C" {
#endif
/** @} */
/**
* @brief Deprecated interrupt control function for backward compatibility
* @{
*/
#define eINT enableIRQ
#define dINT disableIRQ
/** @} */
/**
* @brief Some members of the Cortex-M family have architecture specific
* atomic operations in atomic_arch.c

4
cpu/native/include/cpu.h
View File

@ -26,10 +26,6 @@
extern "C" {
#endif
/* TODO: remove once these have been removed from RIOT: */
void dINT(void);
void eINT(void);
/**
* @brief Prints the last instruction's address
*/

11
cpu/native/irq_cpu.c
View File

@ -218,17 +218,6 @@ int inISR(void)
return _native_in_isr;
}
void dINT(void)
{
disableIRQ();
}
void eINT(void)
{
enableIRQ();
}
int _native_popsig(void)
{
int nread, nleft, i;

4
cpu/native/syscalls.c
View File

@ -121,7 +121,7 @@ void _native_syscall_leave(void)
)
{
_native_in_isr = 1;
disableIRQ();
unsigned int mask = disableIRQ();
_native_cur_ctx = (ucontext_t *)sched_active_thread->sp;
native_isr_context.uc_stack.ss_sp = __isr_stack;
native_isr_context.uc_stack.ss_size = SIGSTKSZ;
@ -130,7 +130,7 @@ void _native_syscall_leave(void)
if (swapcontext(_native_cur_ctx, &native_isr_context) == -1) {
err(EXIT_FAILURE, "_native_syscall_leave: swapcontext");
}
enableIRQ();
restoreIRQ(mask);
}
}

2
sys/posix/pthread/pthread.c
View File

@ -206,7 +206,7 @@ void pthread_exit(void *retval)
}
}
dINT();
disableIRQ();
if (self->stack) {
msg_t m;
m.content.ptr = self->stack;