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boards/stm32: adapt I2C configuration where needed

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This commit is contained in:
Alexandre Abadie 2021-12-02 14:56:01 +01:00
parent cb5fef4486
commit fdacb1a118
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GPG Key ID: 1C919A403CAE1405
10 changed files with 22 additions and 1 deletions
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2
boards/b-l475e-iot01a/include/periph_conf.h
View File

@ -179,6 +179,7 @@ static const i2c_conf_t i2c_config[] = {
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR1_I2C1EN,
.rcc_sw_mask = RCC_CCIPR_I2C1SEL_1, /* HSI (16 MHz) */
.irqn = I2C1_ER_IRQn,
},
{
@ -190,6 +191,7 @@ static const i2c_conf_t i2c_config[] = {
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR1_I2C2EN,
.rcc_sw_mask = RCC_CCIPR_I2C2SEL_1, /* HSI (16 MHz) */
.irqn = I2C2_ER_IRQn,
},
};

2
boards/b-u585i-iot02a/include/periph_conf.h
View File

@ -158,6 +158,7 @@ static const i2c_conf_t i2c_config[] = {
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR1_I2C1EN,
.rcc_sw_mask = RCC_CCIPR1_I2C1SEL_1,
.irqn = I2C1_ER_IRQn,
},
{
@ -169,6 +170,7 @@ static const i2c_conf_t i2c_config[] = {
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR1_I2C2EN,
.rcc_sw_mask = RCC_CCIPR1_I2C2SEL_1,
.irqn = I2C2_ER_IRQn,
},
};

1
boards/common/stm32/include/cfg_i2c1_pb6_pb7.h
View File

@ -45,6 +45,7 @@ static const i2c_conf_t i2c_config[] = {
.bus = APB1,
#if CPU_FAM_STM32L4
.rcc_mask = RCC_APB1ENR1_I2C1EN,
.rcc_sw_mask = RCC_CCIPR_I2C1SEL_1, /* HSI (16 MHz) */
.irqn = I2C1_ER_IRQn,
#else /* CPU_FAM_STM32L0 */
.rcc_mask = RCC_APB1ENR_I2C1EN,

9
boards/common/stm32/include/cfg_i2c1_pb8_pb9.h
View File

@ -50,14 +50,21 @@ static const i2c_conf_t i2c_config[] = {
.rcc_mask = RCC_APB1ENR_I2C1EN,
.clk = CLOCK_APB1,
.irqn = I2C1_EV_IRQn,
#elif CPU_FAM_STM32L4 || CPU_FAM_STM32WB || CPU_FAM_STM32G4 || CPU_FAM_STM32L5
#elif CPU_FAM_STM32L4 || CPU_FAM_STM32WB || CPU_FAM_STM32G4
.rcc_mask = RCC_APB1ENR1_I2C1EN,
.rcc_sw_mask = RCC_CCIPR_I2C1SEL_1, /* HSI (16 MHz) */
.irqn = I2C1_ER_IRQn,
#elif CPU_FAM_STM32L5
.rcc_mask = RCC_APB1ENR1_I2C1EN,
.rcc_sw_mask = RCC_CCIPR1_I2C1SEL_1, /* HSI (16 MHz) */
.irqn = I2C1_ER_IRQn,
#elif CPU_FAM_STM32G0
.rcc_mask = RCC_APBENR1_I2C1EN,
.rcc_sw_mask = RCC_CCIPR_I2C1SEL_1, /* HSI (16 MHz) */
.irqn = I2C1_IRQn,
#elif CPU_FAM_STM32F7
.rcc_mask = RCC_APB1ENR_I2C1EN,
.rcc_sw_mask = RCC_DCKCFGR2_I2C1SEL_1, /* HSI (16 MHz) */
.irqn = I2C1_ER_IRQn,
#elif CPU_FAM_STM32F0 || CPU_FAM_STM32L0
.rcc_mask = RCC_APB1ENR_I2C1EN,

1
boards/lora-e5-dev/include/periph_conf.h
View File

@ -143,6 +143,7 @@ static const i2c_conf_t i2c_config[] = {
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR1_I2C2EN,
.rcc_sw_mask = RCC_CCIPR_I2C2SEL_1, /* HSI (16 MHz) */
.irqn = I2C2_ER_IRQn,
}
};

1
boards/nucleo-l433rc/include/periph_conf.h
View File

@ -131,6 +131,7 @@ static const i2c_conf_t i2c_config[] = {
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR1_I2C1EN,
.rcc_sw_mask = RCC_CCIPR_I2C2SEL_1, /* HSI (16 MHz) */
.irqn = I2C1_ER_IRQn
},
};

1
boards/nucleo-wl55jc/include/periph_conf.h
View File

@ -132,6 +132,7 @@ static const i2c_conf_t i2c_config[] = {
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR1_I2C2EN,
.rcc_sw_mask = RCC_CCIPR_I2C2SEL_1, /* HSI (16 MHz) */
.irqn = I2C2_ER_IRQn,
}
};

1
boards/p-l496g-cell02/include/periph_conf.h
View File

@ -116,6 +116,7 @@ static const i2c_conf_t i2c_config[] = {
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR1_I2C1EN,
.rcc_sw_mask = RCC_CCIPR_I2C1SEL_1, /* HSI (16 MHz) */
.irqn = I2C1_ER_IRQn
},
};

3
boards/stm32f723e-disco/include/periph_conf.h
View File

@ -154,6 +154,7 @@ static const i2c_conf_t i2c_config[] = {
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR_I2C2EN,
.rcc_sw_mask = RCC_DCKCFGR2_I2C2SEL_1,
.irqn = I2C2_ER_IRQn,
},
{ /* Connected to touchscreen controller */
@ -165,6 +166,7 @@ static const i2c_conf_t i2c_config[] = {
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR_I2C3EN,
.rcc_sw_mask = RCC_DCKCFGR2_I2C3SEL_1,
.irqn = I2C3_ER_IRQn,
},
{
@ -176,6 +178,7 @@ static const i2c_conf_t i2c_config[] = {
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR_I2C1EN,
.rcc_sw_mask = RCC_DCKCFGR2_I2C1SEL_1,
.irqn = I2C1_ER_IRQn,
},
};

2
boards/stm32f746g-disco/include/periph_conf.h
View File

@ -160,6 +160,7 @@ static const i2c_conf_t i2c_config[] = {
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR_I2C1EN,
.rcc_sw_mask = RCC_DCKCFGR2_I2C1SEL_1,
.irqn = I2C1_ER_IRQn,
},
{
@ -171,6 +172,7 @@ static const i2c_conf_t i2c_config[] = {
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR_I2C3EN,
.rcc_sw_mask = RCC_DCKCFGR2_I2C3SEL_1,
.irqn = I2C3_ER_IRQn,
},
};