This removes doing `filter-out periph_hwrng, $(FEATURES_PROVIDED)`
after processing `cpu/$(CPU)/Makefile.features`.
The current solution is a HACK as `CPU_MODEL` is currently not available
at that moment but will be in the near future.
It will allow always including `cpu/$(CPU)/Makefile.features` after
`boards/$(BOARD)/Makefile.features`.
It is a part of moving `CPU/CPU_MODEL` definitions to `Makefile.features`.
Previously, there was a very tight allowed margin (100us), then some
special cases for platforms for which the test would otherwise fail,
increasing the margin.
This turned out to be a maintanance burden, as each slightly special
board needed a PR adding the special case.
This commit sets a quite large margin (1000us, 0.1% of total delay),
which should be large enough to not trip over platform-induced timer
inaccuracies, but still verify that the module is using timers
correctly.
(This is not a timer accuracy test.)
This will allow sharing it between Makefile.include and
makefiles/info-global.inc.mk.
Also some common variables definition can also be moved to here.
Part of moving CPU/CPU_MODEL definition to Makefile.features to have it
available before Makefile.include.
ADC pins are now configured using static arrays in header files instead of static variables in implementation to be able to define ADC_NUMOF using the size of these arrays instead of a variable.
ADC pins are now configured using static arrays in header files instead of static variables in implementation to be able to define ADC_NUMOF using the size of these arrays instead of a variable.
Functions that are used by ADC and DAC peripherals are moved to a new submodule periph_adc_ctrl. This is necessary to compile separate submodules for ADC and DAC.
No need to specify SX127X_PARAMS structure as it is already
defined in drivers/sx127x/include/sx127x_params.h.
Also remove SX127X_PARAM_SPI and SX127X_PARAM_PASELECT as their
values are the same as default ones.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
`top_of_stack` isn't aligned down to the previous 16 byte aligned address. Furthermore, `top_of_stack` as well as `XT_CP_SIZE` are used unaligned in `cpu/esp_common/vendor/xtensa/portasm.S` in the address computation for the coprocessor save area, .
Aligning pointer `p` down to the previous 16 byte aligned address results in a wrong address of the coprocessor save area during the initialization of the thread context. This leads to wrong values and wrong positions of these values in the coprocessor save area in inital thread context.
Since ESP8266 doesn't have a coprocessor, this bug affects only ESP32.
