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Joshua DeWeese 264a7c8ef9 cpu/stm32/periph/dma: fix DMA2 on STMF3 families
As it was, the calculation of DMA2's IRQ number was inccrorect for some
STM families. The implmentation alocates streams numbers 0 to 7 for the
first DMA controller and 8 and up for the second DMA controller. This
offset of +8 was not accounted for when IRQ's of the second DMA
controller was calculated. This patch corrects this.
2022-10-26 09:36:44 -04:00
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