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Joshua DeWeese 289814edcf cpu/stm32/periph/timer: don't stop counter
If a timer's channel was set with a really small realtive duration from
now, such that it would be missed (underflowed), the driver would stop
the timer, potentially causing missed ticks. It was stopped to ensure
that the channel's output-compare register could be set to the current
counter value, before re-enabling the timer's counter. This is a
condition that will ensure that the underflow won't happen again and the
interrupt will fire, at the cost of losing some ticks for very high
speed clocks.

This patch replaces the logic that stopped the timer. Instead it uses a
register provided by the timer hardware to trigger timer interrupts via
software.
2023-02-08 14:08:56 -05:00
..
2023-01-08 22:26:12 +01:00
2022-11-03 11:37:33 +01:00