cpu/cortexm_common: Inline thread_yield_higher function
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49
cpu/cortexm_common/include/thread_arch.h
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49
cpu/cortexm_common/include/thread_arch.h
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/*
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* Copyright (C) 2021 Koen Zandberg <koen@bergzand.net>
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* 2021 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_cortexm_common
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* @{
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*
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* @file
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* @brief Implementation of the kernels thread interface
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*
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* @author Koen Zandberg <koen@bergzand.net>
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*
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* @}
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*/
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#ifndef THREAD_ARCH_H
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#define THREAD_ARCH_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define THREAD_API_INLINED
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#ifndef DOXYGEN /* Doxygen is in core/include/thread.h */
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static inline __attribute__((always_inline)) void thread_yield_higher(void)
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{
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/* trigger the PENDSV interrupt to run scheduler and schedule new thread if
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* applicable */
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SCB->ICSR = SCB_ICSR_PENDSVSET_Msk;
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/* flush the pipeline. Otherwise we risk that subsequent instructions are
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* executed before the IRQ has actually triggered */
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__ISB();
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}
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#endif /* DOXYGEN */
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#ifdef __cplusplus
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}
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#endif
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#endif /* THREAD_ARCH_H */
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/** @} */
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@ -296,16 +296,6 @@ void NORETURN cpu_switch_context_exit(void)
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UNREACHABLE();
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}
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void thread_yield_higher(void)
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{
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/* trigger the PENDSV interrupt to run scheduler and schedule new thread if
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* applicable */
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SCB->ICSR = SCB_ICSR_PENDSVSET_Msk;
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/* flush the pipeline. Otherwise we risk that subsequent instructions are
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* executed before the IRQ has actually triggered */
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__ISB();
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}
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#if CPU_CORE_CORTEXM_FULL_THUMB
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void __attribute__((naked)) __attribute__((used)) isr_pendsv(void) {
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__asm__ volatile (
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