Merge pull request #14989 from aabadie/pr/cpu/stm32l4wb_apbx_div2_fix
cpu/stm32l4wb: fix APBx bitfields for divider factor 2
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21fbf62e4e
@ -146,7 +146,7 @@
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#if CONFIG_CLOCK_APB1_DIV == 1
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#define CLOCK_APB1_DIV (RCC_CFGR_PPRE1_DIV1)
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#elif CONFIG_CLOCK_APB1_DIV == 2
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#define CLOCK_APB1_DIV (RCC_CFGR_PPRE1_DIV1)
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#define CLOCK_APB1_DIV (RCC_CFGR_PPRE1_DIV2)
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#elif CONFIG_CLOCK_APB1_DIV == 4
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#define CLOCK_APB1_DIV (RCC_CFGR_PPRE1_DIV4)
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#elif CONFIG_CLOCK_APB1_DIV == 8
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@ -158,7 +158,7 @@
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#if CONFIG_CLOCK_APB2_DIV == 1
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#define CLOCK_APB2_DIV (RCC_CFGR_PPRE2_DIV1)
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#elif CONFIG_CLOCK_APB2_DIV == 2
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#define CLOCK_APB2_DIV (RCC_CFGR_PPRE2_DIV1)
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#define CLOCK_APB2_DIV (RCC_CFGR_PPRE2_DIV2)
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#elif CONFIG_CLOCK_APB2_DIV == 4
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#define CLOCK_APB2_DIV (RCC_CFGR_PPRE2_DIV4)
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#elif CONFIG_CLOCK_APB2_DIV == 8
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