board: Initial import of stm32f4discovery
This commit is contained in:
Hauke Petersen
parent
3cb339a0ee
commit
99ecd4839a
4
boards/stm32f4discovery/Makefile
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4
boards/stm32f4discovery/Makefile
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@ -0,0 +1,4 @@
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# tell the Makefile.base which module to build
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MODULE = $(BOARD)_base
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include $(RIOTBASE)/Makefile.base
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47
boards/stm32f4discovery/Makefile.include
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47
boards/stm32f4discovery/Makefile.include
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@ -0,0 +1,47 @@
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# define the cpu used by the stm32f4-discovery board
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export CPU = stm32f4
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export CPU_MODEL = stm32f407vg
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#define the default port depending on the host OS
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OS := $(shell uname)
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ifeq ($(OS),Linux)
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PORT ?= /dev/ttyUSB0
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else ifeq ($(OS),Darwin)
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PORT ?= $(shell ls -1 /dev/tty.SLAB_USBtoUART* | head -n 1)
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else
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$(info CAUTION: No flash tool for your host system found!)
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# TODO: add support for windows as host platform
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endif
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export PORT
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# define tools used for building the project
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export PREFIX = arm-none-eabi-
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export CC = $(PREFIX)gcc
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export AR = $(PREFIX)ar
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export AS = $(PREFIX)as
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export LINK = $(PREFIX)gcc
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export SIZE = $(PREFIX)size
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export OBJCOPY = $(PREFIX)objcopy
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export TERMPROG = $(RIOTBASE)/dist/tools/pyterm/pyterm.py
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export FLASHER = st-flash
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export DEBUGGER = $(RIOTBOARD)/$(BOARD)/dist/debug.sh
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# define build specific options
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CPU_USAGE = -mcpu=cortex-m4
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FPU_USAGE = -mfloat-abi=hard -mfpu=fpv4-sp-d16
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export CFLAGS += -ggdb -g3 -std=gnu99 -Os -Wall -Wstrict-prototypes $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -mthumb -mthumb-interwork -nostartfiles
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export CFLAGS += -ffunction-sections -fdata-sections -fno-builtin
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export ASFLAGS += -ggdb -g3 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian
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export LINKFLAGS += -g3 -ggdb -std=gnu99 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -static -lgcc -mthumb -mthumb-interwork -nostartfiles
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export LINKFLAGS += -T$(LINKERSCRIPT)
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export OFLAGS = -O binary
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export FFLAGS = write bin/$(BOARD)/$(APPLICATION).hex 0x8000000
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export DEBUGGER_FLAGS = $(RIOTBOARD)/$(BOARD)/dist/gdb.conf $(BINDIR)/$(APPLICATION).elf
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# use newLib nano-specs if available
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ifeq ($(shell $(LINK) -specs=nano.specs -E - 2>/dev/null >/dev/null </dev/null ; echo $$?),0)
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export LINKFLAGS += -specs=nano.specs -lc -lnosys
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endif
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# export board specific includes to the global includes-listing
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export INCLUDES += -I$(RIOTBOARD)/$(BOARD)/include
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63
boards/stm32f4discovery/board.c
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63
boards/stm32f4discovery/board.c
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@ -0,0 +1,63 @@
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup board_stm32f4discovery
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* @{
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*
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* @file
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* @brief Board specific implementations for the STM32F4Discovery evaluation board
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*
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* @}
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*/
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#include "board.h"
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static void leds_init(void);
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void board_init(void)
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{
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/* initialize the boards LEDs, this is done first for debugging purposes */
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leds_init();
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/* initialize the CPU */
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cpu_init();
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}
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/**
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* @brief Initialize the boards on-board LEDs (LD3 and LD4)
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*
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* The LED initialization is hard-coded in this function. As the LEDs are soldered
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* onto the board they are fixed to their CPU pins.
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*
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* The LEDs are connected to the following pins:
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* - LD3: PD13
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* - LD4: PD12
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* - LD5: PD14
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* - LD6: PD15
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*/
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static void leds_init(void)
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{
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/* enable clock for port GPIOD */
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN;
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/* configure pins as general outputs */
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LED_PORT->MODER &= ~(0xff000000);
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LED_PORT->MODER |= 0x55000000;
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/* set output speed high-speed */
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LED_PORT->OSPEEDR |= 0xff000000;
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/* set output type to push-pull */
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LED_PORT->OTYPER &= ~(0xf000);
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/* disable pull resistors */
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LED_PORT->PUPDR &= ~(0xff000000);
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/* turn all LEDs off */
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LED_PORT->BSRRH = 0xf000;
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}
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4
boards/stm32f4discovery/dist/debug.sh
vendored
Executable file
4
boards/stm32f4discovery/dist/debug.sh
vendored
Executable file
@ -0,0 +1,4 @@
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#!/bin/sh
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echo "Debugging $1"
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arm-none-eabi-gdb -tui -command=$1 $2
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1
boards/stm32f4discovery/dist/gdb.conf
vendored
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1
boards/stm32f4discovery/dist/gdb.conf
vendored
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@ -0,0 +1 @@
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tar extended-remote :4242
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88
boards/stm32f4discovery/include/board.h
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88
boards/stm32f4discovery/include/board.h
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@ -0,0 +1,88 @@
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @defgroup board_stm32f4discovery STM32F4Discovery
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* @ingroup boards
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* @brief Board specific files for the STM32F4Discovery board
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* @{
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*
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* @file
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* @brief Board specific definitions for the STM32F4Discovery evaluation board
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef __BOARD_H
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#define __BOARD_H
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#include "cpu.h"
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#include "periph_conf.h"
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/**
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* Define the nominal CPU core clock in this board
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*/
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#define F_CPU CLOCK_CORECLOCK
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/**
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* @name Assign the hardware timer
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*/
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#define HW_TIMER TIMER_0
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/**
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* @name Define UART device and baudrate for stdio
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* @{
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*/
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#define STDIO UART_0
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#define STDIO_BAUDRATE (115200U)
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/** @} */
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/**
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* @name LED pin definitions
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* @{
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*/
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#define LED_PORT GPIOD
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#define LD3_PIN (1 << 13)
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#define LD4_PIN (1 << 12)
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#define LD5_PIN (1 << 14)
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#define LD6_PIN (1 << 15)
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/** @} */
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/**
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* @name Macros for controlling the on-board LEDs.
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* @{
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*/
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#define LD3_ON (LED_PORT->BSRRL = LD3_PIN)
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#define LD3_OFF (LED_PORT->BSRRH = LD3_PIN)
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#define LD3_TOGGLE (LED_PORT->ODR ^= LD3_PIN)
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#define LD4_ON (LED_PORT->BSRRL = LD4_PIN)
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#define LD4_OFF (LED_PORT->BSRRH = LD4_PIN)
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#define LD4_TOGGLE (LED_PORT->ODR ^= LD4_PIN)
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#define LD5_ON (LED_PORT->BSRRL = LD5_PIN)
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#define LD5_OFF (LED_PORT->BSRRH = LD5_PIN)
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#define LD5_TOGGLE (LED_PORT->ODR ^= LD5_PIN)
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#define LD6_ON (LED_PORT->BSRRL = LD6_PIN)
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#define LD6_OFF (LED_PORT->BSRRH = LD6_PIN)
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#define LD6_TOGGLE (LED_PORT->ODR ^= LD6_PIN)
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/* for compatability to other boards */
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#define LED_GREEN_ON LD4_ON
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#define LED_GREEN_OFF LD4_OFF
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#define LED_GREEN_TOGGLE LD4_TOGGLE
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#define LED_RED_ON LD5_ON
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#define LED_RED_OFF LD5_OFF
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#define LED_RED_TOGGLE LD5_TOGGLE
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/** @} */
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/**
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* @brief Initialize board specific hardware, including clock, LEDs and std-IO
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*/
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void board_init(void);
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#endif /** __BOARD_H */
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/** @} */
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386
boards/stm32f4discovery/include/periph_conf.h
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386
boards/stm32f4discovery/include/periph_conf.h
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup board_stm32f4discovery
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* @{
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*
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* @file
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* @name Peripheral MCU configuration for the STM32F4discovery board
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef __PERIPH_CONF_H
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#define __PERIPH_CONF_H
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/**
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* @name Clock system configuration
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* @{
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*/
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#define CLOCK_HSE (8000000U) /* external oscillator */
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#define CLOCK_CORECLOCK (168000000U) /* desired core clock frequency */
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/* the actual PLL values are automatically generated */
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#define CLOCK_PLL_M (CLOCK_HSE / 1000000)
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#define CLOCK_PLL_N ((CLOCK_CORECLOCK / 1000000) * 2)
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#define CLOCK_PLL_P (2U)
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#define CLOCK_PLL_Q (CLOCK_PLL_N / 48)
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#define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1
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#define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV2
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#define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV4
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#define CLOCK_FLASH_LATENCY FLASH_ACR_LATENCY_5WS
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/** @} */
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/**
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* @name Timer configuration
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* @{
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*/
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#define TIMER_NUMOF (2U)
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#define TIMER_0_EN 1
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#define TIMER_1_EN 1
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#define TIMER_IRQ_PRIO 1
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/* Timer 0 configuration */
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#define TIMER_0_DEV TIM2
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#define TIMER_0_CHANNELS 4
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#define TIMER_0_PRESCALER (83U)
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#define TIMER_0_MAX_VALUE (0xffffffff)
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#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
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#define TIMER_0_ISR isr_tim2
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#define TIMER_0_IRQ_CHAN TIM2_IRQn
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/* Timer 1 configuration */
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#define TIMER_1_DEV TIM5
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#define TIMER_1_CHANNELS 4
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#define TIMER_1_PRESCALER (83U)
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#define TIMER_1_MAX_VALUE (0xffffffff)
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#define TIMER_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM5EN)
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#define TIMER_1_ISR isr_tim5
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#define TIMER_1_IRQ_CHAN TIM5_IRQn
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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#define UART_NUMOF (2U)
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#define UART_0_EN 1
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#define UART_1_EN 1
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#define UART_IRQ_PRIO 1
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#define UART_CLK (14000000U) /* UART clock runs with 14MHz */
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/* UART 0 device configuration */
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#define UART_0_DEV USART2
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#define UART_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_USART2EN)
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#define UART_0_CLK (42000000) /* UART clock runs with 42MHz (F_CPU / 4) */
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#define UART_0_IRQ_CHAN USART2_IRQn
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#define UART_0_ISR isr_usart2
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/* UART 0 pin configuration */
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#define UART_0_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
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#define UART_0_PORT GPIOA
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#define UART_0_TX_PIN 2
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#define UART_0_RX_PIN 3
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#define UART_0_AF 7
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/* UART 1 device configuration */
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#define UART_1_DEV USART3
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#define UART_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_USART3EN)
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#define UART_1_CLK (42000000) /* UART clock runs with 42MHz (F_CPU / 4) */
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#define UART_1_IRQ_CHAN USART3_IRQn
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#define UART_1_ISR isr_usart3
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/* UART 1 pin configuration */
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#define UART_1_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN)
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#define UART_1_PORT GPIOD
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#define UART_1_TX_PIN 8
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#define UART_1_RX_PIN 9
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#define UART_1_AF 7
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/** @} */
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/**
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* @name ADC configuration
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* @{
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*/
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#define ADC_NUMOF (0U)
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#define ADC_0_EN 0
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#define ADC_1_EN 0
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/* ADC 0 configuration */
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#define ADC_0_DEV ADC1 /* TODO !!!!!!! */
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#define ADC_0_SAMPLE_TIMER
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/* ADC 0 channel 0 pin config */
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#define ADC_0_C0_PORT
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#define ADC_0_C0_PIN
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#define ADC_0_C0_CLKEN()
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#define ADC_0_C0_AFCFG()
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/* ADC 0 channel 1 pin config */
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#define ADC_0_C1_PORT
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#define ADC_0_C1_PIN
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#define ADC_0_C1_CLKEN()
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#define ADC_0_C1_AFCFG()
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/* ADC 0 channel 2 pin config */
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#define ADC_0_C2_PORT
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#define ADC_0_C2_PIN
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#define ADC_0_C2_CLKEN()
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#define ADC_0_C2_AFCFG()
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/* ADC 0 channel 3 pin config */
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#define ADC_0_C3_PORT
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#define ADC_0_C3_PIN
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#define ADC_0_C3_CLKEN()
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#define ADC_0_C3_AFCFG()
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/* ADC 0 configuration */
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#define ADC_1_DEV ADC2 /* TODO !!!!!!! */
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#define ADC_1_SAMPLE_TIMER
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/* ADC 0 channel 0 pin config */
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#define ADC_1_C0_PORT
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#define ADC_1_C0_PIN
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#define ADC_1_C0_CLKEN()
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#define ADC_1_C0_AFCFG()
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/* ADC 0 channel 1 pin config */
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#define ADC_1_C1_PORT
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#define ADC_1_C1_PIN
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#define ADC_1_C1_CLKEN()
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#define ADC_1_C1_AFCFG()
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/* ADC 0 channel 2 pin config */
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#define ADC_1_C2_PORT
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#define ADC_1_C2_PIN
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#define ADC_1_C2_CLKEN()
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#define ADC_1_C2_AFCFG()
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/* ADC 0 channel 3 pin config */
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#define ADC_1_C3_PORT
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#define ADC_1_C3_PIN
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#define ADC_1_C3_CLKEN()
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#define ADC_1_C3_AFCFG()
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/** @} */
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/**
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* @name PWM configuration
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* @{
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*/
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#define PWM_NUMOF (0U) /* TODO !!!!!!! */
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#define PWM_0_EN 0
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#define PWM_1_EN 0
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/* PWM 0 device configuration */
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#define PWM_0_DEV TIM1
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#define PWM_0_CHANNELS 4
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/* PWM 0 pin configuration */
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#define PWM_0_PORT
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#define PWM_0_PINS
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#define PWM_0_PORT_CLKEN()
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#define PWM_0_CH1_AFCFG()
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#define PWM_0_CH2_AFCFG()
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#define PWM_0_CH3_AFCFG()
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#define PWM_0_CH4_AFCFG()
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/* PWM 1 device configuration */
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#define PWM_1_DEV TIM3
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#define PWM_1_CHANNELS 4
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/* PWM 1 pin configuration */
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#define PWM_1_PORT
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#define PWM_1_PINS
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#define PWM_1_PORT_CLKEN()
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#define PWM_1_CH1_AFCFG()
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#define PWM_1_CH2_AFCFG()
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#define PWM_1_CH3_AFCFG()
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#define PWM_1_CH4_AFCFG()
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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#define SPI_NUMOF (0U) /* TODO !!!!!!! */
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#define SPI_0_EN 0
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#define SPI_1_EN 0
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/* SPI 0 device config */
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#define SPI_0_DEV
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#define SPI_0_CLKEN()
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#define SPI_0_IRQ
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#define SPI_0_IRQ_HANDLER
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#define SPI_0_IRQ_PRIO
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/* SPI 1 pin configuration */
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#define SPI_0_PORT
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#define SPI_0_PINS
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#define SPI_1_PORT_CLKEN()
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#define SPI_1_SCK_AFCFG()
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#define SPI_1_MISO_AFCFG()
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#define SPI_1_MOSI_AFCFG()
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/* SPI 1 device config */
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#define SPI_1_DEV
|
||||
#define SPI_1_CLKEN()
|
||||
#define SPI_1_IRQ
|
||||
#define SPI_1_IRQ_HANDLER
|
||||
#define SPI_1_IRQ_PRIO
|
||||
/* SPI 1 pin configuration */
|
||||
#define SPI_1_PORT
|
||||
#define SPI_1_PINS
|
||||
#define SPI_1_PORT_CLKEN()
|
||||
#define SPI_1_SCK_AFCFG()
|
||||
#define SPI_1_MISO_AFCFG()
|
||||
#define SPI_1_MOSI_AFCFG()
|
||||
/** @} */
|
||||
|
||||
|
||||
/**
|
||||
* @name I2C configuration
|
||||
* @{
|
||||
*/
|
||||
#define I2C_NUMOF (0U) /* TODO !!!!!!! */
|
||||
#define I2C_0_EN 0
|
||||
#define I2C_0_EN 0
|
||||
|
||||
/* SPI 0 device configuration */
|
||||
#define I2C_0_DEV
|
||||
#define I2C_0_CLKEN()
|
||||
#define I2C_0_ISR
|
||||
#define I2C_0_IRQ
|
||||
#define I2C_0_IRQ_PRIO
|
||||
/* SPI 0 pin configuration */
|
||||
#define I2C_0_PORT
|
||||
#define I2C_0_PINS
|
||||
#define I2C_0_PORT_CLKEN()
|
||||
#define I2C_0_SCL_AFCFG()
|
||||
#define I2C_0_SDA_AFCFG()
|
||||
|
||||
/* SPI 1 device configuration */
|
||||
#define I2C_1_DEV
|
||||
#define I2C_1_CLKEN()
|
||||
#define I2C_1_ISR
|
||||
#define I2C_1_IRQ
|
||||
#define I2C_1_IRQ_PRIO
|
||||
/* SPI 1 pin configuration */
|
||||
#define I2C_1_PORT
|
||||
#define I2C_1_PINS
|
||||
#define I2C_1_PORT_CLKEN()
|
||||
#define I2C_1_SCL_AFCFG()
|
||||
#define I2C_1_SDA_AFCFG()
|
||||
/** @} */
|
||||
|
||||
|
||||
/**
|
||||
* @name GPIO configuration
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_NUMOF 12
|
||||
#define GPIO_0_EN 1
|
||||
#define GPIO_1_EN 1
|
||||
#define GPIO_2_EN 1
|
||||
#define GPIO_3_EN 1
|
||||
#define GPIO_4_EN 1
|
||||
#define GPIO_5_EN 1
|
||||
#define GPIO_6_EN 1
|
||||
#define GPIO_7_EN 1
|
||||
#define GPIO_8_EN 1
|
||||
#define GPIO_9_EN 1
|
||||
#define GPIO_10_EN 1
|
||||
#define GPIO_11_EN 1
|
||||
#define GPIO_IRQ_PRIO 1
|
||||
|
||||
/* IRQ config */
|
||||
#define GPIO_IRQ_0 GPIO_0 /* alternatively GPIO_1 could be used here */
|
||||
#define GPIO_IRQ_1 GPIO_2
|
||||
#define GPIO_IRQ_2 GPIO_3
|
||||
#define GPIO_IRQ_3 GPIO_4
|
||||
#define GPIO_IRQ_4 GPIO_5
|
||||
#define GPIO_IRQ_5 GPIO_6
|
||||
#define GPIO_IRQ_6 GPIO_7
|
||||
#define GPIO_IRQ_7 GPIO_8
|
||||
#define GPIO_IRQ_8 GPIO_9
|
||||
#define GPIO_IRQ_9 GPIO_10
|
||||
#define GPIO_IRQ_10 GPIO_11
|
||||
#define GPIO_IRQ_11 -1/* not configured */
|
||||
#define GPIO_IRQ_12 -1/* not configured */
|
||||
#define GPIO_IRQ_13 -1/* not configured */
|
||||
#define GPIO_IRQ_14 -1/* not configured */
|
||||
#define GPIO_IRQ_15 -1/* not configured */
|
||||
|
||||
/* GPIO channel 0 config */
|
||||
#define GPIO_0_PORT GPIOA /* Used for user button 1 */
|
||||
#define GPIO_0_PIN 0
|
||||
#define GPIO_0_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
|
||||
#define GPIO_0_EXTI_CFG() (SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI0_PA)
|
||||
#define GPIO_0_IRQ EXTI0_IRQn
|
||||
/* GPIO channel 1 config */
|
||||
#define GPIO_1_PORT GPIOE /* LIS302DL INT1 */
|
||||
#define GPIO_1_PIN 0
|
||||
#define GPIO_1_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOEEN)
|
||||
#define GPIO_1_EXTI_CFG() (SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI0_PE)
|
||||
#define GPIO_1_IRQ EXTI0_IRQn
|
||||
/* GPIO channel 2 config */
|
||||
#define GPIO_2_PORT GPIOE /* LIS302DL INT2 */
|
||||
#define GPIO_2_PIN 1
|
||||
#define GPIO_2_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOEEN)
|
||||
#define GPIO_2_EXTI_CFG() (SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI1_PE)
|
||||
#define GPIO_2_IRQ EXTI1_IRQn
|
||||
/* GPIO channel 3 config */
|
||||
#define GPIO_3_PORT GPIOE
|
||||
#define GPIO_3_PIN 2
|
||||
#define GPIO_3_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOEEN)
|
||||
#define GPIO_3_EXTI_CFG() (SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI2_PE)
|
||||
#define GPIO_3_IRQ EXTI2_IRQn
|
||||
/* GPIO channel 4 config */
|
||||
#define GPIO_4_PORT GPIOE /* LIS302DL CS */
|
||||
#define GPIO_4_PIN 3
|
||||
#define GPIO_4_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOEEN)
|
||||
#define GPIO_4_EXTI_CFG() (SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI3_PE)
|
||||
#define GPIO_4_IRQ EXTI3_IRQn
|
||||
/* GPIO channel 5 config */
|
||||
#define GPIO_5_PORT GPIOD /* CS43L22 RESET */
|
||||
#define GPIO_5_PIN 4
|
||||
#define GPIO_5_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN)
|
||||
#define GPIO_5_EXTI_CFG() (SYSCFG->EXTICR[1] |= SYSCFG_EXTICR2_EXTI4_PD)
|
||||
#define GPIO_5_IRQ EXTI4_IRQn
|
||||
/* GPIO channel 6 config */
|
||||
#define GPIO_6_PORT GPIOD /* LD8 */
|
||||
#define GPIO_6_PIN 5
|
||||
#define GPIO_6_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN)
|
||||
#define GPIO_6_EXTI_CFG() (SYSCFG->EXTICR[1] |= SYSCFG_EXTICR2_EXTI5_PD)
|
||||
#define GPIO_6_IRQ EXTI9_5_IRQn
|
||||
/* GPIO channel 7 config */
|
||||
#define GPIO_7_PORT GPIOD
|
||||
#define GPIO_7_PIN 6
|
||||
#define GPIO_7_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN)
|
||||
#define GPIO_7_EXTI_CFG() (SYSCFG->EXTICR[1] |= SYSCFG_EXTICR2_EXTI6_PD)
|
||||
#define GPIO_7_IRQ EXTI9_5_IRQn
|
||||
/* GPIO channel 8 config */
|
||||
#define GPIO_8_PORT GPIOD
|
||||
#define GPIO_8_PIN 7
|
||||
#define GPIO_8_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN)
|
||||
#define GPIO_8_EXTI_CFG() (SYSCFG->EXTICR[1] |= SYSCFG_EXTICR2_EXTI7_PD)
|
||||
#define GPIO_8_IRQ EXTI9_5_IRQn
|
||||
/* GPIO channel 9 config */
|
||||
#define GPIO_9_PORT GPIOA
|
||||
#define GPIO_9_PIN 8
|
||||
#define GPIO_9_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
|
||||
#define GPIO_9_EXTI_CFG() (SYSCFG->EXTICR[2] |= SYSCFG_EXTICR3_EXTI8_PA)
|
||||
#define GPIO_9_IRQ EXTI9_5_IRQn
|
||||
/* GPIO channel 10 config */
|
||||
#define GPIO_10_PORT GPIOA /* LD7 */
|
||||
#define GPIO_10_PIN 9
|
||||
#define GPIO_10_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN)
|
||||
#define GPIO_10_EXTI_CFG() (SYSCFG->EXTICR[2] |= SYSCFG_EXTICR3_EXTI9_PA)
|
||||
#define GPIO_10_IRQ EXTI9_5_IRQn
|
||||
/* GPIO channel 11 config */
|
||||
#define GPIO_11_PORT GPIOD
|
||||
#define GPIO_11_PIN 10
|
||||
#define GPIO_11_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN)
|
||||
#define GPIO_11_EXTI_CFG() (SYSCFG->EXTICR[2] |= SYSCFG_EXTICR3_EXTI10_PD)
|
||||
#define GPIO_11_IRQ EXTI15_10_IRQn
|
||||
/** @} */
|
||||
|
||||
#endif /* __PERIPH_CONF_H */
|
||||
/** @} */
|
||||
Loading…
x
Reference in New Issue
Block a user