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boards/z1: adapted to use periph UART driver

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This commit is contained in:
Hauke Petersen 2015-08-27 14:20:53 +02:00
parent daa716aaf8
commit bb204add17
4 changed files with 52 additions and 142 deletions
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8
boards/z1/board.c
View File

@ -24,9 +24,7 @@
#include "cpu.h"
#include "board.h"
void uart_init(void);
#include "msp430_stdio.h"
static void z1_ports_init(void)
{
@ -217,8 +215,8 @@ void board_init(void)
/* initializes DCO */
msp430_init_dco();
/* initialize UART/USB module */
uart_init();
/* initialize STDIO */
msp430_stdio_init();
/* enable interrupts */
__bis_SR_register(GIE);

18
boards/z1/include/board.h
View File

@ -54,6 +54,24 @@ extern "C" {
*/
#define HW_TIMER (0)
/**
* @brief Standard input/output device configuration
* @{
*/
#define STDIO (0)
#define STDIO_BAUDRATE (115200U)
#define STDIO_RX_BUFSIZE (64U)
/** @} */
/**
* @brief Standard input/output device configuration
* @{
*/
#define STDIO (0)
#define STDIO_BAUDRATE (115200U)
#define STDIO_RX_BUFSIZE (64U)
/** @} */
/* MSP430 core */
#define MSP430_INITIAL_CPU_SPEED 8000000uL
#ifndef F_CPU

31
boards/z1/include/periph_conf.h
View File

@ -25,6 +25,16 @@
extern "C" {
#endif
/**
* @brief Clock configuration
*
* @todo Move all clock configuration code here from the board.h
*/
#define CLOCK_CORECLOCK (8000000U)
#define CLOCK_CMCLK CLOCK_CORECLOCK /* no divider programmed */
/** @} */
/**
* @brief Timer configuration
* @{
@ -35,6 +45,27 @@ extern "C" {
#define TIMER_ISR_CCX (TIMERA1_VECTOR)
/** @} */
/**
* @brief UART configuration
* @{
*/
#define UART_NUMOF (1U)
#define UART_0_EN (1U)
#define UART_USE_USIC
#define UART_DEV (USCI_0)
#define UART_IE (SFR->IE2)
#define UART_IF (SFR->IFG2)
#define UART_IE_RX_BIT (1 << 0)
#define UART_IE_TX_BIT (1 << 1)
#define UART_RX_PORT ((msp_port_isr_t *)PORT_2)
#define UART_RX_PIN (1 << 2)
#define UART_TX_PORT ((msp_port_isr_t *)PORT_1)
#define UART_TX_PIN (1 << 1)
#define UART_RX_ISR (USCIAB0RX_VECTOR)
#define UART_TX_ISR (USCIAB0TX_VECTOR)
/** @} */
#ifdef __cplusplus
}
#endif

137
boards/z1/uart.c
View File

@ -1,137 +0,0 @@
/*
* uart.c - Implementation for the Zolertia Z1 UART
* Copyright (C) 2014 INRIA
*
* Author : Kevin Roussel <kevin.roussel@inria.fr>
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_z1
* @{
*
* @file
* @brief Board specific UART/USB driver HAL for the Zolertia Z1
*
* @author Kévin Roussel <Kevin.Roussel@inria.fr>
*
* @}
*/
#include <stdio.h>
#include <stdint.h>
#include "cpu.h"
#include "board.h"
#include "kernel.h"
#include "irq.h"
#include "board_uart0.h"
#define BAUDRATE (115200ul)
#define BAUD_RATE_MAJOR (int)(MSP430_INITIAL_CPU_SPEED / BAUDRATE)
#define BAUD_RATE_MINOR (int)(((MSP430_INITIAL_CPU_SPEED / BAUDRATE) - BAUD_RATE_MAJOR) * 8)
void uart_init(void)
{
/*
* NOTE : MCU pin (GPIO port) initialisation is done
* in board.c, function z1_ports_init().
*/
UCA0CTL1 = UCSWRST; /* hold UART module in reset state
while we configure it */
UCA0CTL1 |= UCSSEL_2; /* source UART's BRCLK from 8 MHz SMCLK */
UCA0MCTL = UCBRS1 + UCBRS0; /* low-frequency baud rate generation,
modulation type 4 */
/* 115200 baud, divided from 8 MHz == 69 */
UCA0BR0 = BAUD_RATE_MAJOR;
UCA0BR1 = BAUD_RATE_MINOR;
/* remaining registers : set to default */
UCA0CTL0 = 0x00; /* put in asynchronous (== UART) mode, LSB first */
UCA0STAT = 0x00; /* reset status flags */
/* clear UART-related interrupt flags */
IFG2 &= ~(UCA0RXIFG | UCA0TXIFG);
/* configuration done, release reset bit => start UART */
UCA0CTL1 &= ~UCSWRST;
/* enable UART0 RX interrupt, disable UART0 TX interrupt */
IE2 |= UCA0RXIE;
IE2 &= ~UCA0TXIE;
}
int putchar(int c)
{
unsigned sr = disableIRQ();
/* the LF endline character needs to be "doubled" into CR+LF */
if (c == '\n') {
putchar('\r');
}
/* wait for a previous transmission to end */
while ((IFG2 & UCA0TXIFG) == 0) {
__asm__("nop");
}
/* load TX byte buffer */
UCA0TXBUF = (uint8_t) c;
restoreIRQ(sr);
return c;
}
int getchar(void)
{
#ifdef MODULE_UART0
return uart0_readc();
#else
return UCA0RXBUF;
#endif
}
uint8_t uart_readByte(void)
{
return UCA0RXBUF;
}
/**
* \brief the interrupt handler for UART reception
*/
void __attribute__((interrupt(USCIAB0RX_VECTOR))) usart1irq(void)
{
volatile int c;
/* Check status register for receive errors. */
if (UCA0STAT & UCRXERR) {
if (UCA0STAT & UCFE) {
puts("UART RX framing error");
}
if (UCA0STAT & UCOE) {
puts("UART RX overrun error");
}
if (UCA0STAT & UCPE) {
puts("UART RX parity error");
}
if (UCA0STAT & UCBRK) {
puts("UART RX break condition -> error");
}
/* Clear error flags by forcing a dummy read. */
c = UCA0RXBUF;
(void)c;
}
#ifdef MODULE_UART0
else if (uart0_handler_pid != KERNEL_PID_UNDEF) {
/* All went well -> let's signal the reception to adequate callbacks */
c = UCA0RXBUF;
uart0_handle_incoming(c);
uart0_notify_thread();
}
#endif
}