cpu/efm32: allow running both LETIMER and regular timer
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c77646ff79
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cbf78fe3d4
@ -357,28 +357,18 @@ typedef struct {
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timer_dev_t prescaler; /**< the lower neighboring timer (not initialized for LETIMER) */
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timer_dev_t timer; /**< the higher numbered timer */
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IRQn_Type irq; /**< number of the higher timer IRQ channel */
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uint8_t channel_numof; /**< number of channels per timer */
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} timer_conf_t;
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/** @} */
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/**
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* @brief The implementation can use one LETIMER or two regular timers cascaded
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* @brief Use LETIMER as the base timer for XTIMER
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*/
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#ifndef CONFIG_EFM32_USE_LETIMER
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#define CONFIG_EFM32_USE_LETIMER 0
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#ifndef CONFIG_EFM32_XTIMER_USE_LETIMER
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#define CONFIG_EFM32_XTIMER_USE_LETIMER 0
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#endif
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#if IS_ACTIVE(CONFIG_EFM32_USE_LETIMER)
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/**
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* @brief This timer implementation has two available channels
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*/
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#define TIMER_CHANNEL_NUMOF (2)
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#else
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/**
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* @brief This timer implementation has three available channels
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*/
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#define TIMER_CHANNEL_NUMOF (3)
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#endif
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/**
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* @brief UART device configuration.
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@ -165,7 +165,7 @@ int timer_set_absolute(tim_t dev, int channel, unsigned int value)
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if (!_is_letimer(dev)) {
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TIMER_TypeDef *tim = timer_config[dev].timer.dev;
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if (channel < 0 || channel >= TIMER_CHANNEL_NUMOF) {
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if (channel < 0 || channel >= timer_config[dev].channel_numof) {
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return -1;
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}
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@ -278,15 +278,12 @@ void timer_start(tim_t dev)
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}
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}
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#ifdef TIMER_0_ISR
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void TIMER_0_ISR(void)
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static void _timer_isr(tim_t dev)
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{
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tim_t dev = 0;
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if (_is_letimer(dev)) {
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LETIMER_TypeDef *tim = timer_config[dev].timer.dev;
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for (int i = 0; i < TIMER_CHANNEL_NUMOF; i++) {
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for (int i = 0; i < timer_config[dev].channel_numof; i++) {
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if (tim->IF & (LETIMER_IF_COMP0 << i))
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{
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LETIMER_IntDisable(tim, LETIMER_IEN_COMP0 << i);
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@ -298,7 +295,7 @@ void TIMER_0_ISR(void)
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else {
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TIMER_TypeDef *tim = timer_config[dev].timer.dev;
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for (int i = 0; i < TIMER_CHANNEL_NUMOF; i++) {
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for (int i = 0; i < timer_config[dev].channel_numof; i++) {
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if (tim->IF & (TIMER_IF_CC0 << i)) {
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tim->CC[i].CTRL = _TIMER_CC_CTRL_MODE_OFF;
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tim->IFC = (TIMER_IFC_CC0 << i);
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@ -308,4 +305,17 @@ void TIMER_0_ISR(void)
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}
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cortexm_isr_end();
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}
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#ifdef TIMER_0_ISR
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void TIMER_0_ISR(void)
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{
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_timer_isr(0);
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}
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#endif /* TIMER_0_ISR */
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#ifdef TIMER_1_ISR
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void TIMER_1_ISR(void)
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{
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_timer_isr(1);
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}
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#endif /* TIMER_1_ISR */
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