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cpu/efm32: allow running both LETIMER and regular timer

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This commit is contained in:
Francisco Molina 2020-08-18 15:41:04 +02:00
parent c77646ff79
commit cbf78fe3d4
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GPG Key ID: 3E94EAC3DBDEEDA8
2 changed files with 21 additions and 21 deletions
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18
cpu/efm32/include/periph_cpu.h
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@ -357,28 +357,18 @@ typedef struct {
timer_dev_t prescaler; /**< the lower neighboring timer (not initialized for LETIMER) */ timer_dev_t prescaler; /**< the lower neighboring timer (not initialized for LETIMER) */
timer_dev_t timer; /**< the higher numbered timer */ timer_dev_t timer; /**< the higher numbered timer */
IRQn_Type irq; /**< number of the higher timer IRQ channel */ IRQn_Type irq; /**< number of the higher timer IRQ channel */
uint8_t channel_numof; /**< number of channels per timer */
} timer_conf_t; } timer_conf_t;
/** @} */ /** @} */
/** /**
* @brief The implementation can use one LETIMER or two regular timers cascaded * @brief Use LETIMER as the base timer for XTIMER
*/ */
#ifndef CONFIG_EFM32_USE_LETIMER #ifndef CONFIG_EFM32_XTIMER_USE_LETIMER
#define CONFIG_EFM32_USE_LETIMER 0 #define CONFIG_EFM32_XTIMER_USE_LETIMER 0
#endif #endif
#if IS_ACTIVE(CONFIG_EFM32_USE_LETIMER)
/**
* @brief This timer implementation has two available channels
*/
#define TIMER_CHANNEL_NUMOF (2)
#else
/**
* @brief This timer implementation has three available channels
*/
#define TIMER_CHANNEL_NUMOF (3)
#endif
/** /**
* @brief UART device configuration. * @brief UART device configuration.

24
cpu/efm32/periph/timer.c
View File

@ -165,7 +165,7 @@ int timer_set_absolute(tim_t dev, int channel, unsigned int value)
if (!_is_letimer(dev)) { if (!_is_letimer(dev)) {
TIMER_TypeDef *tim = timer_config[dev].timer.dev; TIMER_TypeDef *tim = timer_config[dev].timer.dev;
if (channel < 0 || channel >= TIMER_CHANNEL_NUMOF) { if (channel < 0 || channel >= timer_config[dev].channel_numof) {
return -1; return -1;
} }
@ -278,15 +278,12 @@ void timer_start(tim_t dev)
} }
} }
#ifdef TIMER_0_ISR static void _timer_isr(tim_t dev)
void TIMER_0_ISR(void)
{ {
tim_t dev = 0;
if (_is_letimer(dev)) { if (_is_letimer(dev)) {
LETIMER_TypeDef *tim = timer_config[dev].timer.dev; LETIMER_TypeDef *tim = timer_config[dev].timer.dev;
for (int i = 0; i < TIMER_CHANNEL_NUMOF; i++) { for (int i = 0; i < timer_config[dev].channel_numof; i++) {
if (tim->IF & (LETIMER_IF_COMP0 << i)) if (tim->IF & (LETIMER_IF_COMP0 << i))
{ {
LETIMER_IntDisable(tim, LETIMER_IEN_COMP0 << i); LETIMER_IntDisable(tim, LETIMER_IEN_COMP0 << i);
@ -298,7 +295,7 @@ void TIMER_0_ISR(void)
else { else {
TIMER_TypeDef *tim = timer_config[dev].timer.dev; TIMER_TypeDef *tim = timer_config[dev].timer.dev;
for (int i = 0; i < TIMER_CHANNEL_NUMOF; i++) { for (int i = 0; i < timer_config[dev].channel_numof; i++) {
if (tim->IF & (TIMER_IF_CC0 << i)) { if (tim->IF & (TIMER_IF_CC0 << i)) {
tim->CC[i].CTRL = _TIMER_CC_CTRL_MODE_OFF; tim->CC[i].CTRL = _TIMER_CC_CTRL_MODE_OFF;
tim->IFC = (TIMER_IFC_CC0 << i); tim->IFC = (TIMER_IFC_CC0 << i);
@ -308,4 +305,17 @@ void TIMER_0_ISR(void)
} }
cortexm_isr_end(); cortexm_isr_end();
} }
#ifdef TIMER_0_ISR
void TIMER_0_ISR(void)
{
_timer_isr(0);
}
#endif /* TIMER_0_ISR */ #endif /* TIMER_0_ISR */
#ifdef TIMER_1_ISR
void TIMER_1_ISR(void)
{
_timer_isr(1);
}
#endif /* TIMER_1_ISR */