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cpu/samd21: allow to use XOSC32K for GCLK2

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GCLK2 is needed by RTC/RTT, so make it possible to configure it with
XOSC32K as source.
This commit is contained in:
Benjamin Valentin 2019-06-12 18:19:30 +02:00 committed by Benjamin Valentin
parent 7928c74e26
commit d6b8df1ff7
1 changed files with 11 additions and 5 deletions
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16
cpu/samd21/cpu.c
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@ -187,14 +187,20 @@ static void clk_init(void)
/* make sure we synchronize clock generator 0 before we go on */ /* make sure we synchronize clock generator 0 before we go on */
while (GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY) {} while (GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY) {}
#if GEN2_ULP32K
/* Setup Clock generator 2 with divider 1 (32.768kHz) */ /* Setup Clock generator 2 with divider 1 (32.768kHz) */
GCLK->GENDIV.reg = (GCLK_GENDIV_ID(2) | GCLK_GENDIV_DIV(0)); GCLK->GENDIV.reg = (GCLK_GENDIV_ID(2) | GCLK_GENDIV_DIV(0));
GCLK->GENCTRL.reg = (GCLK_GENCTRL_ID(2) | GCLK_GENCTRL_GENEN | GCLK->GENCTRL.reg = (GCLK_GENCTRL_ID(2) | GCLK_GENCTRL_GENEN
GCLK_GENCTRL_RUNSTDBY | | GCLK_GENCTRL_RUNSTDBY
GCLK_GENCTRL_SRC_OSCULP32K); #if GEN2_ULP32K
| GCLK_GENCTRL_SRC_OSCULP32K);
#else
| GCLK_GENCTRL_SRC_XOSC32K);
while (GCLK->STATUS.bit.SYNCBUSY) {} SYSCTRL->XOSC32K.reg = SYSCTRL_XOSC32K_ONDEMAND
| SYSCTRL_XOSC32K_EN32K
| SYSCTRL_XOSC32K_XTALEN
| SYSCTRL_XOSC32K_STARTUP(6)
| SYSCTRL_XOSC32K_ENABLE;
#endif #endif
/* redirect all peripherals to a disabled clock generator (7) by default */ /* redirect all peripherals to a disabled clock generator (7) by default */