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cpu/cc26xx_cc13xx: switch to cortexm.ld linker script

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Signed-off-by: Anton Gerasimov <tossel@gmail.com>
This commit is contained in:
Anton Gerasimov 2019-10-29 21:25:32 +01:00
parent 9fad1e3b6d
commit fa8c0578bf
4 changed files with 15 additions and 38 deletions
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7
cpu/cc13x2/Makefile.include
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@ -3,5 +3,12 @@ CPU_VARIANT = x2
VECTORS_O = $(BINDIR)/cc26xx_cc13xx/vectors.o
ROM_START_ADDR ?= 0x00000000
RAM_START_ADDR ?= 0x20000000
ROM_LEN ?= 352K
RAM_LEN ?= 20K
LINKER_SCRIPT ?= cortexm.ld
include ${RIOTCPU}/cc26xx_cc13xx/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk

19
cpu/cc13x2/ldscripts/cc1352r1.ld
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@ -1,19 +0,0 @@
/**
* @addtogroup cpu_cc13x2
* @{
*
* @file
* @brief linker script for cc13x2 MCUs
*
* @}
*/
/* Memory Space Definitions: */
MEMORY
{
rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x58000
gpram : ORIGIN = 0x11000000, LENGTH = 8K /* configurable as cache. 20K here, 8K there, and 2K in the ld-script of cc13x2ware */
ram (w!rx) : ORIGIN = 0x20000000, LENGTH = 20K /* sram */
}
INCLUDE cortexm_base.ld

8
cpu/cc26x0/Makefile.include
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@ -3,5 +3,13 @@ CPU_VARIANT = x0
VECTORS_O = $(BINDIR)/cc26xx_cc13xx/vectors.o
ROM_START_ADDR ?= 0x00000000
RAM_START_ADDR ?= 0x20000000
ROM_LEN ?= 128K
RAM_LEN ?= 20K
LINKER_SCRIPT ?= cortexm.ld
include ${RIOTCPU}/cc26xx_cc13xx/Makefile.include
include $(RIOTMAKE)/arch/cortexm.inc.mk

19
cpu/cc26x0/ldscripts/cc26x0f128.ld
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@ -1,19 +0,0 @@
/**
* @addtogroup cpu_cc26x0
* @{
*
* @file
* @brief linker script for cc26x0f128 MCUs
*
* @}
*/
/* Memory Space Definitions: */
MEMORY
{
rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00020000 - 88 /* technically, it's 128K */
gpram : ORIGIN = 0x11000000, LENGTH = 8K /* configurable as cache. 20K here, 8K there, and 2K in the ld-script of cc26x0ware */
ram (w!rx) : ORIGIN = 0x20000000, LENGTH = 20K /* sram */
}
INCLUDE cortexm_base.ld