Marian Buschsieweke 0e43c927b1
cpu/stm32: Fix/cleanup periph_eth
The methods to read from / write to MII registers had an address argument to
allow specifying the PHY to communicate with. However, only a single PHY is
available on all boards supported and the driver is not able to operate with
multiple PHYs anyway - thus, drop this parameter for ease of use.

This fixes a bug in the _get_link_status() function, which used hard coded the
address 0; which might not be correct for all boards.
2020-10-09 20:20:54 +02:00
..
2020-10-05 16:03:47 +02:00
2020-10-09 20:20:54 +02:00
2020-07-21 12:45:25 +02:00
2020-05-20 13:39:11 +02:00