d173097d7f
The stm32mp1 family has no flash. The firmware is loaded directly in RAM by stlink programmer or by Cortex-A7 bootloader/OS. Thus bootloader is useless for this family, disable it. Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
48 lines
1.5 KiB
Makefile
48 lines
1.5 KiB
Makefile
include $(RIOTCPU)/stm32/stm32_info.mk
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ifneq (mp1,$(CPU_FAM))
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FEATURES_PROVIDED += bootloader_stm32
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endif
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FEATURES_PROVIDED += cpu_stm32$(CPU_FAM)
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FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_gpio periph_gpio_irq
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FEATURES_PROVIDED += periph_timer_periodic
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FEATURES_PROVIDED += periph_uart_modecfg
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FEATURES_PROVIDED += periph_uart_nonblocking
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FEATURES_PROVIDED += periph_wdt
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ifneq (,$(filter $(CPU_FAM),f0 f1 f3 g0 g4 l0 l1 l4 l5 wb))
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FEATURES_PROVIDED += periph_flashpage
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FEATURES_PROVIDED += periph_flashpage_pagewise
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endif
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ifneq (,$(filter $(CPU_FAM),l0 l1))
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FEATURES_PROVIDED += periph_eeprom
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endif
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ifeq (f1,$(CPU_FAM))
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FEATURES_CONFLICT += periph_rtc:periph_rtt
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FEATURES_CONFLICT_MSG += "On the STM32F1, the RTC and RTT map to the same hardware peripheral."
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endif
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# Not all F4 and L0 parts implement a RNG.
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CPU_MODELS_WITHOUT_HWRNG = stm32f401% stm32f411% stm32f446% stm32l031% stm32l011%
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ifneq (,$(filter $(CPU_FAM),f2 f4 f7 g4 l0 l4 l5 wb))
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ifeq (,$(filter $(CPU_MODELS_WITHOUT_HWRNG),$(CPU_MODEL)))
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FEATURES_PROVIDED += periph_hwrng
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endif
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endif
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ifneq (,$(filter $(CPU_FAM),f2 f4 f7 g4 l1 l4 mp1))
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FEATURES_PROVIDED += cortexm_mpu
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endif
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# only some stm32f3 have an MPU, stm32l052t8 provides an MPU but support is
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# broken for cortex-m0+
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STM32_WITH_MPU += stm32f303re stm32f303vc stm32f303ze
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ifneq (,$(filter $(CPU_MODEL),$(STM32_WITH_MPU)))
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FEATURES_PROVIDED += cortexm_mpu
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endif
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include $(RIOTCPU)/cortexm_common/Makefile.features
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