When enabling & disabling interrupts back-to-back pending interrupts are not serviced on Cortex-M23/M33. Flush the pipeline to give interrupts a chance of executing in `sched_arch_idle()`. This fixes `no_idle_thread` on Cortex-M23.
When enabling & disabling interrupts back-to-back pending interrupts are not serviced on Cortex-M23/M33. Flush the pipeline to give interrupts a chance of executing in `sched_arch_idle()`. This fixes `no_idle_thread` on Cortex-M23.