Benjamin Valentin c48b331051 cpu/cortexm_common: flush pipeline before disabling interrupts in idle
When enabling & disabling interrupts back-to-back pending interrupts
are not serviced on Cortex-M23/M33.

Flush the pipeline to give interrupts a chance of executing in `sched_arch_idle()`.

This fixes `no_idle_thread` on Cortex-M23.
2020-10-16 15:36:28 +02:00
..
2020-09-22 16:26:01 +02:00
2020-07-16 15:35:23 +02:00
2020-07-16 17:01:10 +02:00