Alexandre Abadie b11d65ab70

cpu/stm32l4: enable PLLQ as 48MHz source if possible

2020-10-20 11:37:45 +02:00

..

Makefile

cpu/stm32: rename stmclk_fx to stmclk_f2f4f7

2020-09-24 11:27:24 +02:00

stmclk_common.c

cpu/stm32: add stm32g0 support

2020-07-21 12:45:25 +02:00

stmclk_f0f1f3.c

boards: cpu: stm32f1/f3: rework clock configuration and init

2020-09-24 11:27:24 +02:00

stmclk_f2f4f7.c

cpu/stm32: enable power overdrive on f4 and f7

2020-10-14 13:36:20 +02:00

stmclk_gx.c

cpu: boards: stm32g4: improve clock configuration

2020-08-25 12:55:16 +02:00

stmclk_l0l1.c

cpu/stm32l0: fix clk control register reset

2020-10-15 16:24:33 +02:00

stmclk_l4wb.c

cpu/stm32l4: enable PLLQ as 48MHz source if possible

2020-10-20 11:37:45 +02:00