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cpu/stm32: make ADC resolution uniform

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This commit is contained in:
crasbe 2024-11-08 21:23:10 +01:00
parent 4f676cd318
commit 1d3939d882
20 changed files with 100 additions and 76 deletions
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15
cpu/stm32/include/periph/c0/periph_cpu.h
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@ -31,6 +31,21 @@ extern "C" {
*/ */
#define STM32_BOOTLOADER_ADDR (0x1FFF0000) #define STM32_BOOTLOADER_ADDR (0x1FFF0000)
/**
* @brief Override ADC resolution values
* @{
*/
#define HAVE_ADC_RES_T
typedef enum {
ADC_RES_6BIT = (ADC_CFGR1_RES), /**< ADC resolution: 6 bit */
ADC_RES_8BIT = (ADC_CFGR1_RES_1), /**< ADC resolution: 8 bit */
ADC_RES_10BIT = (ADC_CFGR1_RES_0), /**< ADC resolution: 10 bit */
ADC_RES_12BIT = (0x00), /**< ADC resolution: 12 bit */
ADC_RES_14BIT = (0xfe), /**< ADC resolution: 14 bit (not supported) */
ADC_RES_16BIT = (0xff) /**< ADC resolution: 16 bit (not supported) */
} adc_res_t;
/** @} */
/** /**
* @name Constants for internal VBAT ADC line * @name Constants for internal VBAT ADC line
* @{ * @{

12
cpu/stm32/include/periph/f0/periph_cpu.h
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@ -53,12 +53,12 @@ extern "C" {
*/ */
#define HAVE_ADC_RES_T #define HAVE_ADC_RES_T
typedef enum { typedef enum {
ADC_RES_6BIT = (0x3 << 3), /**< ADC resolution: 6 bit */ ADC_RES_6BIT = (ADC_CFGR1_RES), /**< ADC resolution: 6 bit */
ADC_RES_8BIT = (0x2 << 3), /**< ADC resolution: 8 bit */ ADC_RES_8BIT = (ADC_CFGR1_RES_1), /**< ADC resolution: 8 bit */
ADC_RES_10BIT = (0x1 << 3), /**< ADC resolution: 10 bit */ ADC_RES_10BIT = (ADC_CFGR1_RES_0), /**< ADC resolution: 10 bit */
ADC_RES_12BIT = (0x0 << 3), /**< ADC resolution: 12 bit */ ADC_RES_12BIT = (0x00), /**< ADC resolution: 12 bit */
ADC_RES_14BIT = (0xfe), /**< not applicable */ ADC_RES_14BIT = (0xfe), /**< ADC resolution: 14 bit (not supported) */
ADC_RES_16BIT = (0xff) /**< not applicable */ ADC_RES_16BIT = (0xff) /**< ADC resolution: 16 bit (not supported) */
} adc_res_t; } adc_res_t;
/** @} */ /** @} */

12
cpu/stm32/include/periph/f2/periph_cpu.h
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@ -54,12 +54,12 @@ extern "C" {
*/ */
#define HAVE_ADC_RES_T #define HAVE_ADC_RES_T
typedef enum { typedef enum {
ADC_RES_6BIT = 0x03000000, /**< ADC resolution: 6 bit */ ADC_RES_6BIT = (ADC_CR1_RES), /**< ADC resolution: 6 bit */
ADC_RES_8BIT = 0x02000000, /**< ADC resolution: 8 bit */ ADC_RES_8BIT = (ADC_CR1_RES_1), /**< ADC resolution: 8 bit */
ADC_RES_10BIT = 0x01000000, /**< ADC resolution: 10 bit */ ADC_RES_10BIT = (ADC_CR1_RES_0), /**< ADC resolution: 10 bit */
ADC_RES_12BIT = 0x00000000, /**< ADC resolution: 12 bit */ ADC_RES_12BIT = (0x00), /**< ADC resolution: 12 bit */
ADC_RES_14BIT = 1, /**< ADC resolution: 14 bit (not supported) */ ADC_RES_14BIT = (0xfe), /**< ADC resolution: 14 bit (not supported) */
ADC_RES_16BIT = 2 /**< ADC resolution: 16 bit (not supported)*/ ADC_RES_16BIT = (0xff) /**< ADC resolution: 16 bit (not supported)*/
} adc_res_t; } adc_res_t;
/** @} */ /** @} */

12
cpu/stm32/include/periph/f3/periph_cpu.h
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@ -61,12 +61,12 @@ extern "C" {
*/ */
#define HAVE_ADC_RES_T #define HAVE_ADC_RES_T
typedef enum { typedef enum {
ADC_RES_6BIT = (ADC_CFGR_RES), /**< ADC resolution: 6 bit */ ADC_RES_6BIT = (ADC_CFGR_RES), /**< ADC resolution: 6 bit */
ADC_RES_8BIT = (ADC_CFGR_RES_1), /**< ADC resolution: 8 bit */ ADC_RES_8BIT = (ADC_CFGR_RES_1), /**< ADC resolution: 8 bit */
ADC_RES_10BIT = (ADC_CFGR_RES_0), /**< ADC resolution: 10 bit */ ADC_RES_10BIT = (ADC_CFGR_RES_0), /**< ADC resolution: 10 bit */
ADC_RES_12BIT = (0x0), /**< ADC resolution: 12 bit */ ADC_RES_12BIT = (0x00), /**< ADC resolution: 12 bit */
ADC_RES_14BIT = (0x1), /**< not applicable */ ADC_RES_14BIT = (0xfe), /**< ADC resolution: 14 bit (not supported) */
ADC_RES_16BIT = (0x2) /**< not applicable */ ADC_RES_16BIT = (0xff) /**< ADC resolution: 16 bit (not supported) */
} adc_res_t; } adc_res_t;
/** @} */ /** @} */

14
cpu/stm32/include/periph/f4/periph_cpu.h
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@ -56,17 +56,17 @@ extern "C" {
#define GET_RDP(x) ((x & 0xFF00) >> 8) #define GET_RDP(x) ((x & 0xFF00) >> 8)
/** /**
* @brief Override the ADC resolution configuration * @brief Override ADC resolution values
* @{ * @{
*/ */
#define HAVE_ADC_RES_T #define HAVE_ADC_RES_T
typedef enum { typedef enum {
ADC_RES_6BIT = 0x03000000, /**< ADC resolution: 6 bit */ ADC_RES_6BIT = (ADC_CR1_RES), /**< ADC resolution: 6 bit */
ADC_RES_8BIT = 0x02000000, /**< ADC resolution: 8 bit */ ADC_RES_8BIT = (ADC_CR1_RES_1), /**< ADC resolution: 8 bit */
ADC_RES_10BIT = 0x01000000, /**< ADC resolution: 10 bit */ ADC_RES_10BIT = (ADC_CR1_RES_0), /**< ADC resolution: 10 bit */
ADC_RES_12BIT = 0x00000000, /**< ADC resolution: 12 bit */ ADC_RES_12BIT = (0x00), /**< ADC resolution: 12 bit */
ADC_RES_14BIT = 1, /**< ADC resolution: 14 bit (not supported) */ ADC_RES_14BIT = (0xfe), /**< ADC resolution: 14 bit (not supported) */
ADC_RES_16BIT = 2 /**< ADC resolution: 16 bit (not supported)*/ ADC_RES_16BIT = (0xff) /**< ADC resolution: 16 bit (not supported) */
} adc_res_t; } adc_res_t;
/** @} */ /** @} */

14
cpu/stm32/include/periph/f7/periph_cpu.h
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@ -44,17 +44,17 @@ extern "C" {
#define ADC_DEVS (3U) #define ADC_DEVS (3U)
/** /**
* @brief Override the ADC resolution configuration * @brief Override ADC resolution values
* @{ * @{
*/ */
#define HAVE_ADC_RES_T #define HAVE_ADC_RES_T
typedef enum { typedef enum {
ADC_RES_6BIT = 0x03000000, /**< ADC resolution: 6 bit */ ADC_RES_6BIT = (ADC_CR1_RES), /**< ADC resolution: 6 bit */
ADC_RES_8BIT = 0x02000000, /**< ADC resolution: 8 bit */ ADC_RES_8BIT = (ADC_CR1_RES_1), /**< ADC resolution: 8 bit */
ADC_RES_10BIT = 0x01000000, /**< ADC resolution: 10 bit */ ADC_RES_10BIT = (ADC_CR1_RES_0), /**< ADC resolution: 10 bit */
ADC_RES_12BIT = 0x00000000, /**< ADC resolution: 12 bit */ ADC_RES_12BIT = (0x00), /**< ADC resolution: 12 bit */
ADC_RES_14BIT = 1, /**< ADC resolution: 14 bit (not supported) */ ADC_RES_14BIT = (0xfe), /**< ADC resolution: 14 bit (not supported) */
ADC_RES_16BIT = 2 /**< ADC resolution: 16 bit (not supported)*/ ADC_RES_16BIT = (0xff) /**< ADC resolution: 16 bit (not supported) */
} adc_res_t; } adc_res_t;
/** @} */ /** @} */

15
cpu/stm32/include/periph/g0/periph_cpu.h
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@ -32,6 +32,21 @@ extern "C" {
*/ */
#define STM32_BOOTLOADER_ADDR (0x1FFF0000) #define STM32_BOOTLOADER_ADDR (0x1FFF0000)
/**
* @brief Override ADC resolution values
* @{
*/
#define HAVE_ADC_RES_T
typedef enum {
ADC_RES_6BIT = (ADC_CFGR1_RES), /**< ADC resolution: 6 bit */
ADC_RES_8BIT = (ADC_CFGR1_RES_1), /**< ADC resolution: 8 bit */
ADC_RES_10BIT = (ADC_CFGR1_RES_0), /**< ADC resolution: 10 bit */
ADC_RES_12BIT = (0x00), /**< ADC resolution: 12 bit */
ADC_RES_14BIT = (0xfe), /**< ADC resolution: 14 bit (not supported) */
ADC_RES_16BIT = (0xff) /**< ADC resolution: 16 bit (not supported) */
} adc_res_t;
/** @} */
/** /**
* @name Constants for internal VBAT ADC line * @name Constants for internal VBAT ADC line
* @{ * @{

12
cpu/stm32/include/periph/l0/periph_cpu.h
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@ -40,12 +40,12 @@ extern "C" {
*/ */
#define HAVE_ADC_RES_T #define HAVE_ADC_RES_T
typedef enum { typedef enum {
ADC_RES_6BIT = (0x3 << 3), /**< ADC resolution: 6 bit */ ADC_RES_6BIT = (ADC_CFGR1_RES), /**< ADC resolution: 6 bit */
ADC_RES_8BIT = (0x2 << 3), /**< ADC resolution: 8 bit */ ADC_RES_8BIT = (ADC_CFGR1_RES_1), /**< ADC resolution: 8 bit */
ADC_RES_10BIT = (0x1 << 3), /**< ADC resolution: 10 bit */ ADC_RES_10BIT = (ADC_CFGR1_RES_0), /**< ADC resolution: 10 bit */
ADC_RES_12BIT = (0x0 << 3), /**< ADC resolution: 12 bit */ ADC_RES_12BIT = (0x00), /**< ADC resolution: 12 bit */
ADC_RES_14BIT = (0xfe), /**< not applicable */ ADC_RES_14BIT = (0xfe), /**< ADC resolution: 14 bit (not supported)*/
ADC_RES_16BIT = (0xff) /**< not applicable */ ADC_RES_16BIT = (0xff) /**< ADC resolution: 16 bit (not supported)*/
} adc_res_t; } adc_res_t;
/** @} */ /** @} */
#endif /* ndef DOXYGEN */ #endif /* ndef DOXYGEN */

12
cpu/stm32/include/periph/l1/periph_cpu.h
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@ -45,12 +45,12 @@ extern "C" {
*/ */
#define HAVE_ADC_RES_T #define HAVE_ADC_RES_T
typedef enum { typedef enum {
ADC_RES_6BIT = (ADC_CR1_RES_0 | ADC_CR1_RES_1), /**< ADC resolution: 6 bit */ ADC_RES_6BIT = (ADC_CR1_RES), /**< ADC resolution: 6 bit */
ADC_RES_8BIT = (ADC_CR1_RES_1), /**< ADC resolution: 8 bit */ ADC_RES_8BIT = (ADC_CR1_RES_1), /**< ADC resolution: 8 bit */
ADC_RES_10BIT = (ADC_CR1_RES_0), /**< ADC resolution: 10 bit */ ADC_RES_10BIT = (ADC_CR1_RES_0), /**< ADC resolution: 10 bit */
ADC_RES_12BIT = (0x00), /**< ADC resolution: 12 bit */ ADC_RES_12BIT = (0x00), /**< ADC resolution: 12 bit */
ADC_RES_14BIT = (0xfe), /**< not applicable */ ADC_RES_14BIT = (0xfe), /**< ADC resolution: 14 bit (not supported)*/
ADC_RES_16BIT = (0xff) /**< not applicable */ ADC_RES_16BIT = (0xff) /**< ADC resolution: 16 bit (not supported)*/
} adc_res_t; } adc_res_t;
/** @} */ /** @} */
#endif /* ndef DOXYGEN */ #endif /* ndef DOXYGEN */

12
cpu/stm32/include/periph/l4/periph_cpu.h
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@ -61,12 +61,12 @@ extern "C" {
*/ */
#define HAVE_ADC_RES_T #define HAVE_ADC_RES_T
typedef enum { typedef enum {
ADC_RES_6BIT = (ADC_CFGR_RES), /**< ADC resolution: 6 bit */ ADC_RES_6BIT = (ADC_CFGR_RES), /**< ADC resolution: 6 bit */
ADC_RES_8BIT = (ADC_CFGR_RES_1), /**< ADC resolution: 8 bit */ ADC_RES_8BIT = (ADC_CFGR_RES_1), /**< ADC resolution: 8 bit */
ADC_RES_10BIT = (ADC_CFGR_RES_0), /**< ADC resolution: 10 bit */ ADC_RES_10BIT = (ADC_CFGR_RES_0), /**< ADC resolution: 10 bit */
ADC_RES_12BIT = (0x0), /**< ADC resolution: 12 bit */ ADC_RES_12BIT = (0x00), /**< ADC resolution: 12 bit */
ADC_RES_14BIT = (0x1), /**< not applicable */ ADC_RES_14BIT = (0xfe), /**< ADC resolution: 14 bit (not supported) */
ADC_RES_16BIT = (0x2) /**< not applicable */ ADC_RES_16BIT = (0xff) /**< ADC resolution: 16 bit (not supported) */
} adc_res_t; } adc_res_t;
/** @} */ /** @} */

12
cpu/stm32/include/periph/wb/periph_cpu.h
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@ -58,12 +58,12 @@ extern "C" {
*/ */
#define HAVE_ADC_RES_T #define HAVE_ADC_RES_T
typedef enum { typedef enum {
ADC_RES_6BIT = (ADC_CFGR_RES), /**< ADC resolution: 6 bit */ ADC_RES_6BIT = (ADC_CFGR_RES), /**< ADC resolution: 6 bit */
ADC_RES_8BIT = (ADC_CFGR_RES_1), /**< ADC resolution: 8 bit */ ADC_RES_8BIT = (ADC_CFGR_RES_1), /**< ADC resolution: 8 bit */
ADC_RES_10BIT = (ADC_CFGR_RES_0), /**< ADC resolution: 10 bit */ ADC_RES_10BIT = (ADC_CFGR_RES_0), /**< ADC resolution: 10 bit */
ADC_RES_12BIT = (0x0), /**< ADC resolution: 12 bit */ ADC_RES_12BIT = (0x00), /**< ADC resolution: 12 bit */
ADC_RES_14BIT = (0x1), /**< not applicable */ ADC_RES_14BIT = (0xfe), /**< ADC resolution: 14 bit (not supported) */
ADC_RES_16BIT = (0x2) /**< not applicable */ ADC_RES_16BIT = (0xff) /**< ADC resolution: 16 bit (not supported) */
} adc_res_t; } adc_res_t;
/** @} */ /** @} */

12
cpu/stm32/include/periph/wl/periph_cpu.h
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@ -42,12 +42,12 @@ extern "C" {
*/ */
#define HAVE_ADC_RES_T #define HAVE_ADC_RES_T
typedef enum { typedef enum {
ADC_RES_6BIT = (ADC_CFGR1_RES), /**< ADC resolution: 6 bit */ ADC_RES_6BIT = (ADC_CFGR1_RES), /**< ADC resolution: 6 bit */
ADC_RES_8BIT = (ADC_CFGR1_RES_1), /**< ADC resolution: 8 bit */ ADC_RES_8BIT = (ADC_CFGR1_RES_1), /**< ADC resolution: 8 bit */
ADC_RES_10BIT = (ADC_CFGR1_RES_0), /**< ADC resolution: 10 bit */ ADC_RES_10BIT = (ADC_CFGR1_RES_0), /**< ADC resolution: 10 bit */
ADC_RES_12BIT = (0x0), /**< ADC resolution: 12 bit */ ADC_RES_12BIT = (0x00), /**< ADC resolution: 12 bit */
ADC_RES_14BIT = (0x1), /**< not applicable */ ADC_RES_14BIT = (0xfe), /**< ADC resolution: 14 bit (not supported) */
ADC_RES_16BIT = (0x2) /**< not applicable */ ADC_RES_16BIT = (0xff) /**< ADC resolution: 16 bit (not supported) */
} adc_res_t; } adc_res_t;
/** @} */ /** @} */

2
cpu/stm32/periph/adc_f0_g0_c0.c
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@ -201,7 +201,7 @@ int32_t adc_sample(adc_t line, adc_res_t res)
int sample; int sample;
/* check if resolution is applicable */ /* check if resolution is applicable */
if (res > 0xf0) { if ((res & ADC_CFGR1_RES) != res) {
return -1; return -1;
} }

2
cpu/stm32/periph/adc_f2.c
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@ -109,7 +109,7 @@ int32_t adc_sample(adc_t line, adc_res_t res)
int sample; int sample;
/* check if resolution is applicable */ /* check if resolution is applicable */
if (res < 0xff) { if ((res & ADC_CR1_RES) != res) {
return -1; return -1;
} }

2
cpu/stm32/periph/adc_f3.c
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@ -207,7 +207,7 @@ int32_t adc_sample(adc_t line, adc_res_t res)
int sample; int sample;
/* Check if resolution is applicable */ /* Check if resolution is applicable */
if (res & 0x3) { if ((res & ADC_CFGR_RES) != res) {
return -1; return -1;
} }

2
cpu/stm32/periph/adc_f4_f7.c
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@ -129,7 +129,7 @@ int32_t adc_sample(adc_t line, adc_res_t res)
int sample; int sample;
/* check if resolution is applicable */ /* check if resolution is applicable */
if (res & 0xff) { if ((res & ADC_CR1_RES) != res) {
return -1; return -1;
} }

5
cpu/stm32/periph/adc_l0.c
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@ -118,10 +118,7 @@ int32_t adc_sample(adc_t line, adc_res_t res)
int sample; int sample;
/* check if resolution is applicable */ /* check if resolution is applicable */
if ( (res != ADC_RES_6BIT) && if ((res & ADC_CFGR1_RES) != res) {
(res != ADC_RES_8BIT) &&
(res != ADC_RES_10BIT) &&
(res != ADC_RES_12BIT)) {
return -1; return -1;
} }

5
cpu/stm32/periph/adc_l1.c
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@ -145,10 +145,7 @@ int32_t adc_sample(adc_t line, adc_res_t res)
int sample; int sample;
/* check if resolution is applicable */ /* check if resolution is applicable */
if ( (res != ADC_RES_6BIT) && if ((res & ADC_CR1_RES) != res) {
(res != ADC_RES_8BIT) &&
(res != ADC_RES_10BIT) &&
(res != ADC_RES_12BIT)) {
return -1; return -1;
} }

2
cpu/stm32/periph/adc_l4_wb.c
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@ -221,7 +221,7 @@ int32_t adc_sample(adc_t line, adc_res_t res)
int sample; int sample;
/* check if resolution is applicable */ /* check if resolution is applicable */
if (res & 0x3) { if ((res & ADC_CFGR_RES) != res) {
return -1; return -1;
} }

2
cpu/stm32/periph/adc_wl.c
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@ -168,7 +168,7 @@ int32_t adc_sample(adc_t line, adc_res_t res)
int sample; int sample;
/* check if resolution is applicable */ /* check if resolution is applicable */
if (res & 0x3) { if ((res & ADC_CFGR1_RES) != res) {
return -1; return -1;
} }